Sony STR-DA9000ES Service Manual page 129

Pin No. Pin Name
GP5, GP4
118, 119
GP3
120
121 NC
122 A0
123 to 125 D4 to D2
VDDE
126
127 VSS
D1, D0
128, 129
130 to 132 GP2 to GP0
SDCLK
133
134 CLKEN
DQM
135
EXLOCK
136
VDDI
137
138 VSS
MCLK2
139
PM
140
BST
141
142 BOOT
TST
143
MCLK1
144
I/O
O
Not used
O
Error signal output to the main system controller
— Not used
O
Address signal output to the S-RAM
I/O
Two-way data bus with the S-RAM
—
Power supply terminal (+3.3V)
— Ground terminal
I/O
Two-way data bus with the S-RAM
O
Not used
O
SD-RAM clock signal output terminal Not used
O SD-RAM chip enable output terminal Not used
O
Output terminal of data input/output mask Not used
I
Lock signal input from the main system controller
—
Power supply terminal (+2.6V)
— Ground terminal
O
System clock output terminal (13.5 MHz)
I
PLL initialize signal input from the main system controller
I
Boot strap signal input from the main system controller
I Boot mode control signal input terminal Not used
I
Not used
I
System clock input terminal (13.5 MHz)
Description
STR-DA9000ES
129