Sony STR-DA9000ES Service Manual page 128

STR-DA9000ES
Pin No. Pin Name
D21 to D19
56 to 58
A11
59
60, 61 SDO1, SDO2
KFSIO
62
LRCKO
63
BCKO
64
65 VDDI
VSS
66
D18, D17
67, 68
A10, A9
69, 70
71 CAS
RAS
72
VDDI
73
HDIN
74
75 HCLK
HCS
76
A8, A7
77, 78
D16, D15
79, 80
81 VSS
HDOUT
82
HACN
83
CS0
84
85 WE0
A6
86
D14 to D12
87 to 89
90 VDDE
91 VSS
D11 to D9
92 to 94
A5
95
VDDI
96
97 TCK
98 TDI
TDO
99
TMS
100
101 XTRST
VSS
102
D8, D7
103, 104
A4, A3
105, 106
107, 108 GP10, GP9
VDDI
109
GP8
110
GP7
111
112 GP6
A2, A1
113, 114
D6, D5
115, 116
VSS
117
128
I/O
I/O
Two-way data bus with the S-RAM
O
Address signal output to the S-RAM
O Audio serial data output to the DC cut digital filter
I
Audio clock signal input terminal
O
L/R sampling clock signal (44.1 kHz) output to the DC cut digital filter
O
Bit clock signal (2.8224 MHz) output to the DC cut digital filter
— Power supply terminal (+2.6V)
—
Ground terminal
I/O
Two-way data bus with the S-RAM
O
Address signal output to the S-RAM
O Column address strobe signal output terminal Not used
O
Row address strobe signal output terminal Not used
—
Power supply terminal (+2.6V)
I
Serial data input from the main system controller
I Serial data transfer clock signal input from the main system controller
I
Chip select signal input from the main system controller
O
Address signal output to the S-RAM
I/O
Two-way data bus with the S-RAM
— Ground terminal
O
Serial data output to the main system controller
O
Acknowledge signal output to the main system controller
O
Chip select signal output to the S-RAM
O Write enable signal output to the S-RAM
O
Address signal output to the S-RAM
I/O
Two-way data bus with the S-RAM
—
Power supply terminal (+3.3V)
— Ground terminal
I/O
Two-way data bus with the S-RAM
O
Address signal output to the S-RAM
—
Power supply terminal (+2.6V)
I Simplicity emulation clock signal input terminal Not used
I
Simplicity emulation data input terminal Not used
O
Simplicity emulation data input terminal Not used
I
Simplicity emulation data input start and end select Not used
I Simplicity emulation non-sync break signal input terminal Not used
—
Ground terminal
I/O
Two-way data bus with the S-RAM
O
Address signal output to the S-RAM
O Not used
—
Power supply terminal (+2.6V)
O
Not used
I
L/R sampling clock signal (44.1 kHz) input terminal
O Not used
O
Address signal output to the S-RAM
I/O
Two-way data bus with the S-RAM
—
Ground terminal
Description