Kenwood TK-880 Service Manual page 29

TK-880
Unlock Circuit
During reception, the TR signal goes high, the KEY signal
goes low, and Q10 turns on. Q11 turns on and a voltage is
applied to the collector (8R). During transmission, the TR
signal goes low, the KEY signal goes high and Q13 turns on.
Q12 turns on and a voltage is applied to 8T.
The CPU in the control unit monitors the PLL (IC300) LD
signal directly. When the PLL is unlocked during transmis-
sion, the PLL LD signal goes low. The CPU detects this
signal and makes the KEY signal low. When the KEY signal
goes low, no voltage is applied to 8T, and no signal is trans-
mitted.
8R
LD
IC300
PLL
PLL lock
: LD "H"
CONTORL UNIT
Fig. 7 Unlock circuit
Power Amplifier Circuit
The transmit output signal from the VCO is amplified to a
specified level of the power module (IC400) by the drive
block (Q203, Q204, Q205). The amplified signal passes
through the transmission/reception selection diode (D209)
and goes to a low-pass filter. The low-pass filter removes
unwanted high-frequency harmonic components, and the
resulting signal is goes the antenna terminal.
APC Circuit
The automatic transmission power control (APC) circuit
detects part of a power module output with a diode (D27,
D30) and applies a voltage to Q21. Q21 compares the APC
control voltage (PC) generated by the D/A converter (IC5)
and DC amplifier (IC6) with the detection output voltage to
control Q19 and Q20, generates DB voltage from B voltage,
and stabilizes transmission output.
Q202,204 Q205
RF RF POWER
D15
AMP AMP
DB
DRIVER
Q20
8T
DRIVER
(TX : 8V)
Q21
IC6 Q17
PC
DC PC
IC5
AMP SW CONTROL
23pin
TX :
PC SW ON
Fig. 8 APC circuit
28
CIRCUIT DESCRIPTION
8C
Q11 Q12
8T
SW SW
Q10 Q13
SW SW
TR KEY
IC508
IC511
SHIFT
CPU
REG.
ANT
IC400 D209
ANT
LPF
AMP SW
Q19
D27,30
APC POWER
+B
DET
PRI
Q29
APC H/L
SW
VR1
Q17 turns the PC signal on or off using 8T so that the
circuit works only during transmission. With stability at low
power in mind, Q29 turns off to optimize the detection volt-
age.
The APC circuit is configured to protect overcurrent of
the power module due to fluctuations of the load at the an-
tenna end and to stabilize transmission output at voltage
and temperature variations.
Control Circuit
The CPU carries out the following tasks:
1) Controls the shift register (IC7, IC8, IC508) AF MUTE,
WIDE/NARROW, T/R KEY outputs.
2) Adjusts the AF signal level of the audio processor (IC504)
and turns the filter select compounder on or off.
3) Controls the DTMF decoder (IC507).
4) Controls the LCD assembly display data.
5) Controls the PLL (IC300).
6) Controls the D/A converter (IC5) and adjusts the volume,
modulation and transmission power.
IC508
Shift
register
IC504
Audio
processor AFCLR
AFMSKE
AFDAT
AFRDT
AFTRD
AFRTM
AFSTB
IC507
DTMF
DECO.
Memory Circuit
The transceiver has a 2M-bit (256k x 8) flash ROM
(IC510) and an 16k-bit EEPROM (IC512). The flash ROM
contains firmware programs, data and user data which is
programmed with the FPU. The EEPROM contains adjust-
ment data. The CPU (IC511) controls the flash ROM
through an external address bus and an external data bus.
The CPU controls the EEPROM through two serial data
lines.
IC510
FLASH
ROM
H/L
IC7 5pin
25W (High power)
: "H"
LCD ASSY
TX-RX UNIT
RFCK
ES
IC511
CPU
EN
Fig. 9 Control circuit
SCL
ADDRESS BUS
IC511
SDA
CPU
DATA BUS
Fig. 10 Memory circuit
IC8
Shift
register
DT
IC7
Shift
register
IC5
D/A
converter
IC300
PLL
IC512
EEPROM