Sony STR-DA3200ES Service Manual page 121

Multi channel av receiver
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Pin No.
Pin Name
84
OVDD
85
OVSS
MA1, MA6,
86 to 89
MA0, MA7
90
OVSS
91
TEST5
92
CVSS
93
OVDD
MA10, MA8,
94 to 97
MA11, MA9
98
OVDD
99
OVSS
100
RAS
101
DQM
102
CAS
103
MCLK
104
WE
105
TEST3
106
TEST4
107
OVSS
108
OVDD
109
CVDD
MD7, MD8,
110 to 113
MD6, MD9
114
OVDD
115
OVSS
MD5, MD10,
116 to 119
MD4, MD11
120
OVDD
121
OVSS
MD3, MD12,
122 to 125
MD2, MD13
126
OVSS
127
CVSS
128
OVDD
MD1, MD14,
129 to 132
MD0, MD15
133
SLV
134
RFFO
135
SDA
136
SCL
137
SRN
138
OVSS
139
CVDD
140
PLL VDD
141
VPDX
I/O
-
Power supply terminal (+3.3V) (for I/O)
-
Ground terminal (for I/O)
O
Address signal output to the SD-RAM
-
Ground terminal (for I/O)
-
Ground terminal (for I/O)
-
Ground terminal (for core)
-
Power supply terminal (+3.3V) (for I/O)
O
Address signal output to the SD-RAM
-
Power supply terminal (+3.3V) (for I/O)
-
Ground terminal (for I/O)
O
Row address strobe signal output to the SD-RAM
O
Data mask signal output to the SD-RAM
O
Column address strobe signal output to the SD-RAM
O
Serial data transfer clock signal output to the SD-RAM
O
Write enable signal output to the SD-RAM
I
Terminal for test Fixed at "L" in this set
I
Terminal for test Fixed at "L" in this set
-
Ground terminal (for I/O)
-
Power supply terminal (+3.3V) (for I/O)
-
Power supply terminal (+2.5V) (for core)
I/O
Two-way data bus with the SD-RAM
-
Power supply terminal (+3.3V) (for I/O)
-
Ground terminal (for I/O)
I/O
Two-way data bus with the SD-RAM
-
Power supply terminal (+3.3V) (for I/O)
-
Ground terminal (for I/O)
I/O
Two-way data bus with the SD-RAM
-
Ground terminal (for I/O)
-
Ground terminal (for core)
-
Power supply terminal (+3.3V) (for I/O)
I/O
Two-way data bus with the SD-RAM
MPU interface slave address setting terminal
I
Slave address setting: 0 x 72 when SLV is "0", 0 x 70 when SLV is "1"
O
MPEG flag (repeat first field flag) output terminal Not used
I2C two-way data bus with the HDMI receiver, HDMI transmitter, HDMI controller, VIDEO A/D
I/O
converter and video encoder
I
Serial data transfer clock signal input from the HDMI controller
I
System reset signal input from the HDMI controller "L": reset
-
Ground terminal (for I/O)
-
Power supply terminal (+2.5V) (for core)
-
Power supply terminal (+2.5V) (for PLL)
-
Not used
STR-DA3200ES/DG1000
Description
121

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