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Portwell PEB-2772VGATM User Manual

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PEB-2772VGATM
Embedded System Board
User's Manual
Version 1.1
Copyright © Portwell, Inc., 2012 All rights reserved.
All other brand names are registered trademarks of their respective owners.

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Summary of Contents for Portwell PEB-2772VGATM

  • Page 1 PEB-2772VGATM Embedded System Board User's Manual Version 1.1 Copyright © Portwell, Inc., 2012 All rights reserved. All other brand names are registered trademarks of their respective owners.

  • Page 2: Table Of Contents

    Preface Table of Contents How to Use This Manual Chapter 1 System Overview.......................1-1 1.1 Introduction ....................... 1-1 1.2 Check List......................1-1 1.3 Product Specification..................1-2 1.4 System Configuration..................1-3 1.5 System Architecture..................1-5 Chapter 2 Hardware Configuration ...................2-1 2.1 Jumper Setting ....................2-1 2.2 Connector Allocation..................

  • Page 3: How To Use This Manual

    Portwell may make supplement or change in the products described in this document at any time. Updates to this manual, technical clarification, and answers to frequently asked questions will be shown on the following web site : http://www.portwell.com.tw/.

  • Page 4: Chapter 1 System Overview

    Chapter 1 System Overview Introduction Portwell Inc., a world-leading innovator in the Industrial PC (IPC) market and a member of the Intel® Embedded and Communications Alliance (Intel ECA), announced today the Portwell PEB-2772 utilizing the Intel® ECX form factor based on the Intel® Atom™ processor D2550 and the Intel® System...

  • Page 5: Product Specification

    System Overview Product Specification Main Processor Intel ® Atom™ D2550 dual-core processor - CPU clock speed: 1.86GHz Chipset Intel NM10 chipset ® System BIOS Phoenix BIOS Main Memory One 204 - pin DDR3 SODIMM socket support up to 4GB 800/1066 MHz memory Expansion Interface One PCIex1 SATA Interface...

  • Page 6: System Configuration

    Configuration System Configuration System Configuration CPU Type Intel (R) Atom(TM) CPU D2550 @1.86GHz FSB:533MHz SBC BIOS Portwell, Inc.PEB-2772VGATM BIOS Rev.:R1.00.W3(07092012) Memory Transcend DDR3 1066 SODIMM 2G(SEC HCH9K4B1G0846F) VGA Card Onboard Intel® Graphics Media Accelerator 3600 Series VGA Driver Intel® Graphics Media Accelerator 3600 Series Ver:8.14.8.1075 LAN Card Onboard Intel®...

  • Page 7: Mechanical Drawing

    System Overview Mechanical Drawing PEB-2772AVGATM User’s Manual...

  • Page 8: System Architecture

    System Overview System Architecture All of details operating relations are shown in System Block PEB-2772VGATM Diagram. PEB-2772VGATM System Block Diagram PEB-2772AVGATM User’s Manual...

  • Page 9: Chapter 2 Hardware Configuration

    System Installation Chapter 2 Hardware Configuration This chapter gives the definitions and shows the positions of jumpers, headers and connector. All of the configuration jumpers on PEB-2772VGTM are in the proper position. The default settings are indicated with a star sign (★). Jumper Setting In general, jumpers on the single board computer are used to select options for certain features.

  • Page 10: Solder Side

    System Installation Solder side PEB-2772AVGATM User’s Manual...

  • Page 11: Connector Allocation

    System Installation Connector Allocation USB (0-1) Connector (5*2-1 Pin Header/2.0mm) USB (2-3) Connector (5*2-1 Pin Header/2.0mm) SATA2 Connector SATA Power Output Connector (1*4 Pin Wafer/2.54mm) PS/2 Keyboard/Mouse Connector (1*6 Pin Wafer/2.0mm) RTC Battery Connector SATA1 Connector Hard disk LED Connector SM BUS signal connector CPU FAN Connector COM3 (RS-232) (2*5 Pin BOX Header/2.0mm)
  • Page 12 System Installation Pin Assignments of Connectors J1: USB (0-1) Connector (5*2-1 Pin Header/2.0mm) PIN NO. DESCRIPTION PIN NO. DESCRIPTION SB_D0- SB_D1 SB_D0+ SB_D1+ J2: USB (2-3) Connector (5*2-1 Pin Header/2.0mm) PIN NO. DESCRIPTION PIN NO. DESCRIPTION SB_D2- SB_D3 SB_D2+ SB_D3+ J3: SATA2 Connector) PIN NO.
  • Page 13 System Installation J6: PS/2 Keyboard/Mouse connector (1*6 Pin Wafer/2.0mm) PIN NO. DESCRIPTION K/B CLK M/S DATA K/B DATE KB5V M/S CLK J9: Hard disk LED Connector PIN NO. DESCRIPTION Hard Disk signal J10: SM BUS signal connector PIN NO. DESCRIPTION SM_CLK NC(No Key) SM_DATA...
  • Page 14 System Installation J13: System Panel Connectors (2*4 Pin Header/2.0mm) PIN NO. DESCRIPTION PIN NO. DESCRIPTION 5VSB SUSEND LED- PWRLED+ PWRLED- SYS_RESET# PWR_ON_SW# J14: Port 80 Connector (2*5-1(Pin 9) Pin Header/2.0mm) PIN NO. DESCRIPTION PIN NO. DESCRIPTION LPC AD0 +3.3V LPC AD1 RESET LPC AD2 LPC FRAME...
  • Page 15 System Installation J18: COM4 (RS-232) (2*5 Pin BOX Header/2.0mm) PIN NO. DESCRIPTION PIN NO. DESCRIPTION DCD#4 DSR#4 RXD#4 RTS#4 TXD#4 CTS#4 DTR#4 V_RI4 J19: COM2 (RS-232) (2*5 Pin BOX Header/2.0mm) PIN NO. DESCRIPTION PIN NO. DESCRIPTION DCD#2 DSR#2 RXD#2 RTS#2 TXD#2 CTS#2 DTR#2...
  • Page 16 System Installation J23: Line-IN / Line-OUT/Microphone connector (4*2 Pin Header 2.0mm) PIN NO. DESCRIPTION PIN NO. DESCRIPTION MIC_L Line in L Line in R Line out L Line out R MIC_R J24: +12V input Connector) PIN NO. Signal Description +12V +12V J25: Reserve J26: RJ45 LAN Connector...
  • Page 17 System Installation J32: USB(6) Connector(4*Pin Header/2.0mm) PIN NO. DESCRIPTION USB_D6- USB_D6+ JP1: Case open Connector) PIN NO. DESCRIPTION CASEOP# JP2: LCD Panel Voltage Setup (1*3 Pin Header/2.0mm) PIN NO. DESCRIPTION Short +1.8V (Scaler)★ Short +2.5V(Bypass) JP3: LVDS Inverter Power Connector PIN NO.
  • Page 18 System Installation JP6/JP7/JP8/JP9:COM RI Function Setup (3*2 Pin Header/2.0mm) PIN NO. DESCRIPTION Short +5V Output RI Function ★ Short Short +12V Output NOTES:COM1 (J31/JP7), COM2(J19/JP6), COM3(J12/JP8), COM4(J18/JP9) JP10: COM2 RS232/422/485 select header PIN NO. DESCRIPTION 9-11 10-12 15-17 16-18 Other RS-232 Function★...
  • Page 19 System Installation PEB-2772AVGATM User’s Manual 2-11...

  • Page 20: Chapter 3 System Installation

    System Installation Chapter 3 System Installation This chapter provides you with instructions to set up your system. The additional information is enclosed to help you set up onboard PCI device and handle Watch Dog Timer (WDT) and operation of GPIO in software programming. Intel ®...
  • Page 21 System Installation Please refer to section 3.3.1 to 3.3.7 to install INF/VGA/LAN/Audio drivers. PEB-2772AVGATM User’s Manual...

  • Page 22: Chipset Component Driver

    System Installation 3.3.1 Chipset Component Driver The chipset on PEB-2772 is a new chipset that a few old operating systems might not be able to recognize. To overcome this compatibility issue, for Windows Operating Systems such as Windows 7, please install its INF driver before any other drivers installation.

  • Page 23: Clear Cmos Operation

    System Installation Clear CMOS Operation The following table indicates how to enable/disable Clear CMOS Function hardware circuit by putting jumpers at proper position. JP4:COMS Setup (1*3 Pin Header/2.0 mm PIN No Description Normal (Keep CMOS Setup)★ Clear CMOS Setup PEB-2772AVGATM User’s Manual...

  • Page 24: Wdt Function

    The working algorithm of the WDT function can be simply described as a counting process. The Time-Out Interval can be set through software programming. The availability of the time-out interval settings by software or hardware varies from boards to boards. PEB-2772VGATM allows users control...
  • Page 25 System Installation outp(EFER,WDT_PIN_SEL_REG); //Select Multi-function Pin Selection Register is 0x2d outp(EFER + 1,inp(EFER + 1) & ~tmp); //Set bit0 to 0 to enable WDT function, 0:WDTO# 1:GPIO50 outp(EFER, DEVICE_NUM_REG); //Select Logic Device Number Register is 0x07 outp(EFER + 1, WDT_LOGIC_NUM); //device number for WDTO# is 0x08 outp(EFER, WDT_CNT_REG);...

  • Page 26: Gpio

    System Installation GPIO #define EFER 0x2e //Address for Extended Function Enable Register #define DEVICE_NUM_REG 0x07 //Address for Logic Device Number Register #define GPIO_LOGIC_NUM 0x08 //Logic device number for GPIO #define GPIO_BASE_REG 0x30 //Set GPIO #define GPIO_IO_REG 0xe0 //Address for GPIO I/O Register #define GPIO_MODE_OUT 0 #define GPIO_DATA_REG 0xe1 //Address for GPIO Data Register...
  • Page 27 System Installation o4utp(EFER, 0xAA); return 0; PEB-2772AVGATM User’s Manual...

  • Page 28: Chapter 4 Bios Setup Information

    BIOS Setup Information Chapter 4 BIOS Setup Information PEB-2772 equipped with the Phoenix BIOS stored in SPI Flash. BIOS has built-in setup program that allows users to adjust the basic system configuration. This type of information is stored in CMOS RAM that it is retained even if power-off periods. When system turns on, PEB-2772 communicates with peripheral devices and checks its hardware resources referring to the configuration information stored in CMOS memory.

  • Page 29: Main

    BIOS Setup Information Main Once you enter PEB-2772 Phoenix BIOS CMOS Setup Utility, a Main Menu is presented. The Main Menu allows user to select from eleven setup functions and two exit choices. Use arrow keys to switch among items and press <Enter> key to accept or bring up the sub-menu.

  • Page 30: Configuration

    BIOS Setup Information Configuration This section allows users to configure further BIOS function. Boot Configuration PEB-2772AVGATM User’s Manual...
  • Page 31 BIOS Setup Information Diagnostic Splash Screen This item shows a Diagnostic screen during boot up. This screen is also accessible through the App Menu. The choice: Enabled, Disabled. Diagnostic Summary Screen This item shows a Diagnostic Summary Screen during boot up. The boot process will stop by displaying this screen until a key is pressed.
  • Page 32 BIOS Setup Information ICH PCI Express Configuration DMI Link ASPM Control Allows the system skip certain tests while booting. This will decrease the time needed to boot the system. Choices: Enabled, Disabled. PEB-2772AVGATM User’s Manual...
  • Page 33 BIOS Setup Information PCI Express Root Port 1~4 PCI Express Root Port 1/2/3/4 Control the PCI Express Root Port. PCIe Speed Select PCIe Speed to Gen1 or Gen2. ASPM Set the ASPM Level: Force L0 – Force all links to L0 state : AUTO – BIOS auto configure : DISABLE –...
  • Page 34 BIOS Setup Information SENFE Enable or disable Root PCI Express System Error on Non-Fatal Error. SECE Enable or disable Root PCI Express System Error on Correctable Error. PME Interrupt Enable or disable PCI Express PME Interrupt. Power Control Configuration Enable Hibernation Enables or Disable System ability to Hibernate (OS/S4 Sleep State).
  • Page 35 BIOS Setup Information Wake up By Ring Enable or disable Ring to wake the system. CPU Configuration Hyper-threading Enabled for Windows XP and Linux (OS optimized for Hyper-Threading Technology) and Disabled for other OS (OS not optimized for Hyper- Threading Technology).

  • Page 36: Lan Configuration

    BIOS Setup Information Local x2APIC Enable Local x2APIC. Some 0Ses do not support this. LAN Configuration Wake on LAN Enable or disable integrated LAN to wake the system. LAN Boot ROM Enable or disable integrated LAN Boot ROM(PXE) function. PEB-2772AVGATM User’s Manual...

  • Page 37: Chipset Configuration

    BIOS Setup Information Chipset Configuration Memory Configuration PEB-2772AVGATM User’s Manual 4-10...
  • Page 38 BIOS Setup Information Graphic Configuration Primary Display Select which of IGFX/PEG/PCI Graphics device should be Primary Display or select SG for Switchable Gfx. The choice: Auto, IGFX, PEG, PCI Boot Display Select the video Device which will be activated during POST. This has no effect if external graphics present.
  • Page 39 BIOS Setup Information SATA Configuration SATA Controller(s) Determines how SATA controller(s) operate Choices: Enabled, Disabled Launch Storage OpROM Enable or disable boot option Launch Storage devices with option ROM. Choices: Enabled, Disabled. SATA Mode Determines how SATA controller(s) operate. The choice: IDE, AHCI, RAID PEB-2772AVGATM User’s Manual 4-12...
  • Page 40 BIOS Setup Information USB Configuration Legacy USB Support Enable Legacy USB support. AUTO option disables legacy support if no USB devices are connected. DISABLE option will keep USB device available only for EFI applications Choices: Enabled Disabled, AUTO PEB-2772AVGATM User’s Manual 4-13...
  • Page 41 BIOS Setup Information PCH USB Configuration USB Ports Per-Port Disable Control each of the USB ports disabling Choices: Enabled, Disabled USB Port #0~#6 Disable Disable selected USB port Choices: Enabled, Disabed. PEB-2772AVGATM User’s Manual 4-14...

  • Page 42: Sio Configuration

    BIOS Setup Information SIO Configuration PEB-2772AVGATM User’s Manual 4-15...
  • Page 43 BIOS Setup Information On Board Serial Port 1 Choices: Enabled, Disabled Base I/O Address Choices: 3F8, 2F8, 3E8, 2E8 Interrupt Choices: 3, 4, 5, 11 On Board Serial Port 2 Choices: Enabled, Disabled Base I/O Address Choices: 3F8, 2F8, 3E8, 2E8 Interrupt Choices: 3, 4, 5, 11 On Board Serial Port 3...

  • Page 44: Hardware Monitor

    BIOS Setup Information Hardware Monitor Smart Fan Control PEB-2772AVGATM User’s Manual 4-17...
  • Page 45 BIOS Setup Information SYS Smart Fan control Smart Fan Mode select Choices: Full Speed, Thermal Cruise Mode, Fan Speed Cruise Mode Serial Port Console Configuration Console Redirection Console Redirection Enable or Disable Choices: Enabled, Disabled PEB-2772AVGATM User’s Manual 4-18...
  • Page 46 BIOS Setup Information Console Redirection Setting Terminal Type VT-UTF8 is the preferred terminal type for out-of-band management. The next best choice is VT100+ and then VT100. See above, in console Redirection Settings page, for more Help with Terminal Type/Emulation. The choice: VT100, VT100+, VT-UTF8, ANSI Bits Per second Select serial port transmission speed The choice: 9600, 19200, 57600, 115200.

  • Page 47: Security

    BIOS Setup Information Security This section lets you set security passwords to control access to the system at boot time and/or when entering the BIOS setup program. Some systems have a single password, while many newer ones now have two: a supervisor and a user password. Set Supervisor/User Password Set or Clear Supervisor Password Supervisor/User Hint String...

  • Page 48: Boot

    BIOS Setup Information Boot Use this menu to specify the priority of boot devices. PEB-2772AVGATM User’s Manual 4-21...

  • Page 49: Security

    BIOS Setup Information Security This menu allows you to load the BIOS default values or factory default settings into the BIOS and exit the BIOS setup utility with or without changes. Exit Saving Changes Exit system setup after saving the changes. Exit Discarding Changes Exit system setup without saving the changes.

  • Page 50: Chapter 5 Troubleshooting

    Troubleshooting Chapter 5 Troubleshooting This chapter provides a few useful tips to quickly get PEB-2772 running with success. As basic hardware installation has been addressed in Chapter 2, this chapter will be focusing on system integration issues, in terms of BIOS setting, and OS diagnostics. Hardware Quick Installation There are two methods to connect the power of PEB-2772 which are 12V DC Jack &...

  • Page 51: Faq

    BIOS setting back to the initial factory configuration. It is recommended to do this so you can be sure the system is running with the BIOS setting that Portwell has highly endorsed. As a matter of fact, users can load the default BIOS setting any time when system appears to be unstable in boot up sequence.
  • Page 52 Troubleshooting System Memory Address Map Each On-board device in the system is assigned a set of memory addresses, which also can be identical of the device. The following table lists the system memory address used for your reference. System Memory Address Map Memory Area Size Description...
  • Page 53 Troubleshooting Interrupt Request Lines (IRQ) Peripheral devices can use interrupt request lines to notify CPU for the service required. The following table shows the IRQ used by the devices on board. Interrupt Request Lines IRQ IRQ# Current Use Default Use IRQ 0 System ROM System Timer...

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