MAXDATA BELINEA 101705 Service Manual page 19

Belinea 101705 (111723) Service Manual
Analog Bandwidth, Full Power 250 MHz
Channel to Channel Matching 0.5% Full-Scale
3.3V Supply Voltages VVDD_33 -0.3 3.6 V
2.5V Supply Voltages VVDD_25 -0.3 2.75 V
Input Voltage (5V tolerant inputs) VIN5Vtol -0.3 5.0 V
Input Voltage (non 5V tolerant inputs) VIN -0.3 VVDD_33 V
B. MTV312M64
The MTV312M micro-controller is an 8051 CPU core embedded device especially tailored for CRT/LCD
Monitor applications. It includes an 8051 CPU core, 1024-byte SRAM, 14 built-in PWM DACs, VESA DDC interface,
4-channel A/D converter, and a 64K-byte internal program Flash-ROM.
A "CMOS output pin" means it can sink and drive at least 4mA current. It is not recommended to use such
pin as input function.
A "open drain pin" means it can sink at least 4mA current but only drive 10~20uA to VDD. It can be used as input or
output function and needs an external pull up resistor.
A "8051 standard pin" is a pseudo open drain pin. It can sink at least 4mA current when output is at low level, and drives at
least 4mA current for 160nS when output transits from low to high, then keeps driving at 100uA to maintain the pin at high
level. It can be used as input or output function. It needs an external pull up resistor when driving heavy load device.
POWER CONFIGURATION
The MTV312M can work on 5V or 3.3V power supply system.
In 5V power system, the VDD pin is connected to 5V power and the VDD3 needs an external capacitor, all
output pins can swing from 0~5V, input pins can accept 0~5V input range.
And ADC conversion range is 5V. However, X1 and X2 pins must be kept below 3.3V.
In 3.3V power system, the VDD and VDD3 are connected to 3.3V power, all output pins swing from 0~3.3V, HSYNC,
VSYNC and open drain pin can accept 0~5V input range, other pins must be kept below 3.3V. And the ADC conversion
range is 3.3V.
C. INVERTER
In order to drive the CCFLs embedded in the panel module, there is a half bridge inverter to convert by the controller.
The input 12V up to hundreds of AC voltage output.
The inverter is formed by symmetric in order to drive the separate lamp modules.
The input stage consists of a PWM controller, half bridge inverter, and switching MOSFET to convert DC input into AC
output.
The output stage consists of a tuning capacitor, coupling capacitor, transformer, push-pull MOSFET pair to boost AC
output up to hundreds of voltage.
And one resister is serial to lamp for output voltage feedback.
There are two signal to control the inverter which come from system.
Logic "high" level which send to I901 is turn on the inverter.
BRI signal control brightness by DC level which was integral from PWM signal.
D. AUDIO
The TDA7496L is a stereo 2W+2W class AB
power amplifier assembled in the @ Powerdip
14+3+3 package, specially designed for high
quality sound, TV and Monitor applications.
Features of the TDA7496L include linear volume
control, Stand-by and mute functions
Ipeak Output Peak Current (internally limited) 0.7 0.9 A
Vin Input Signal 2.8 Vrms
GV Closed Loop Gain Vol Ctrl > 4.5V 28.5 30 31.5 dB
GvLine Monitor Out Gain Vol Ctrl > 4.5V; Zload > 30KΩ -1.5 0 1.5 dB
AMin VOL Attenuation at Minimum Volume Vol Ctrl < 0.5V 80 dB
BW 0.6 MHz
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VS DC Supply Voltage 26 V
VIN Maximum Input Voltage 8 Vpp
Ptot Total Power Dissipation (Tcase = 60°C) 6 W
Tamb Ambient Operating Temperature 0 to 70 °C
Tstg, Tj Storage and Junction Temperature -40 to 150 °C
V6 Volume CTRL DC voltage 7 V
0 4 8 12 Area(cm2)
-17- 4/22/2004