HP 13255 Technical Information page 22

13255
General Purpose Asvnchronous Data
ro~m
Module
132S5-9108Q/20
P~v AUG-Ot-16
3.6.3
3.1
3.1.t
~hen ~he
receive handshake circuit Is enabled (RHE Switch closed), CD
is griven by the DR outout of the UART. When DR is
a~tive
(a character
is tn the
r~ceiver
holdinq reaister of the UART), CO is turned off. CD
isturn~d
off at
th~
nominal
cent~r
of
th~
first stop bit of each re-
ceive
charact~r.
When the character Is read by the processor (OR
cleared),
en
15
turned on. It should be noted that the mandatory dis-
c?nnect fpature (Fsrt) cannot be tlsed when the receive handshake
circuit is
~nabled.
To use the receive handshak~ function, the IAT (Inhibit ATN) Switch
must be
close~.
The PCA will not qenerate interrupts and must he
scanned for received data.
STATUS.
~
.
The status circuit is used to gate
RS232C
control siqnal information
(CF,
ca,
an1 58) and OAPT status siqnals (DP, THFE,
O~,
and PEl to the
terminal data bus. When the proper address 15 decoded, this circuit
qates sevpn bits of status.information onto the data bus while REO is
low. (Pefer to table 6.2 for detailed explanation of data bit inter-
pretation.)
3.8 FTRMWAFE CONTROL WORD. The firmware control word circuit consists of
drivers that qate an 8-blt fIrmware control word to the terminal data
bus when enabled by the I/O instruction decoder. when the proper ad-
dress is decoded, Switch FCO through FC7 information is
gat~d
onto the
3.9.1
data bus while
REO
is low. A closed
switch~prOduces
a logic 0 on the
data hus and an open switch generates a logic
1.
CIJRRENT LOOP. The current loop circuits (In and but) provide the capa-
bilitv Of transmittlnq and receivincr data in a 20-mA dc current loop.
(Refer to fiqure 4 for current loop ConfiQurations.)
The current loop receiver (In) is enabled when ENCL (P2, Pin
1)
is low
(qroUnded). The rec.eiver can be confiqured as a floatinq, passive re-
ceiver or as a non-floating, active receiver.