HP 13255 Technical Information page 24

13251)
General Purpose AsynchrOnous Data Comm Module
13255-91089/22
Rev AUG-01-76
3.9.2.2 The
first stage of
the
transmitter consists of an
NPN (2N4401)
an~
a
PNP (2N4403)
transistor
02
and
01,
respectively. This circuit shifts
the data from TTL levels to the l?V levels reauired to turn the 20 mA
current controllers on ann off. The second staqe controls the sourced
and sunk current when on, and presents a hiqh impedance to the line
when
O~f.
The CLA
~nd
CLP output pins are
~rotected
with series di-
odes. The output current is controlled
bv
impressinq
a
constant
voltaqe across the
O.lSK
ann
O.10K
resistors that are in series with
the
out~ut.
This voltaae is maintained by the
1.SK, 8.2K, 1.5K
voltaqe
divider. When the transmitter is on,
24V
is impressed across these re-
sistors. The two diodes In series with these resistors are used to
reduce current variations due to temperature chanqes.
3.Q.2.3
A mark is transmitted as
curr~nt
in the line.
By qroun~inQ INO (P2,
Pin
8),
a space
CAn
be
transmltte~
as
current
in
the line.
'J.Q.3
Cnrrent Loop Spect.flcat10ns.
~in
Passive Receiver, floatlna
Markinq Current
15.0
~paclnq
Currpnt
0.0
VoltaQe Drop,
~arklnq 1.4
Active Receiver, Non-floatinQ
Markina Current
~pacln9
Current
npen Circuit Voltaqe
Active Transmitter
Marklnq Current Sourcen
Markinq Current SunK
SPAcinq
CUTr~nt
Peceivpr Voltaqe
(receiver sourcinq)
(receiver sinkina)
-
0.0
2(\.0
1.4
17.0
2'5.0
0.0
7.5
-12.0
~alC
--_
..
-
25.00
5.00
1.80
10.00
25.00
t.80
25.00
3r;.00
0.01
12.00
7.50
Units
----.
mA
mA
volts
mA
rnA
volts
rnA
rnA
mA
volts
volts