Astro Spectra Plus Vocoder Section; Figure 3-14. Astro Spectra Plus Vocon Board - Controller Section - Motorola ASTRO Digital Spectra Plus Service Manual

Theory of Operation: ASTRO Spectra Plus VOCON Board
In addition to the SPI bus, the controller also maintains two asynchronous serial busses; the SB9600
bus and an RS232 serial bus. The SB9600 bus is for interfacing the controller section to different
hardware option boards, some of which may be external to the radio. The RS232 is used as a
common data interface for external devices.
User input from the control head is sent to the controller through SB9600 bus messages. Feedback
to the user is provided by the display on the control head. The display is 2-line 14 characters on the
W3 model, 8 characters on W4, W5, and W7 models; and 11 characters on the W9 model.
The controller schedules the activities of the DSP through the host port interface, which is internal to
the Patriot IC (the MCU and DSP are both contained within the Patriot IC). This includes setting the
operational modes and parameters of the DSP. The controlling of the DSP is similar to programming
analog signaling ICs on standard analog radios.
Command Board Command Board
ADDAG ADDAG
Encryption Board Encryption Board
KRSIC KRSIC

Figure 3-14. ASTRO Spectra Plus VOCON Board - Controller Section

3.4.3

ASTRO Spectra Plus Vocoder Section

Refer to Figure 3-15 on page 3-40
The vocoder section of the ASTRO Spectra Plus VOCON board is made up of a digital signal
processor (DSP) core, 84Kx24 Program RAM, 2Kx24 Program ROM, and 62Kx16 Data RAM, which
are all integrated into the Patriot IC (U300). The vocoder also contains the KRSIC (U200) and
ADDAG (U201).
The FLASH ROM (U301) contains both the program code executed by the DSP and the controller
firmware. As with the FLASH ROM used in the controller section, the FLASH ROM is
reprogrammable so new features and algorithms can be updated in the field as they become
available. Depending on the mode and operation of the DSP, corresponding program code is moved
from the FLASH ROM into the faster SRAM, where it is executed at the full bus rate.
The KRSIC and ADDAG IC's are the support IC's for the DSP. In the receive mode, the KRSIC
(U200) acts as an interface to the ABACUS IC, which can provide data samples directly to the DSP
for processing. In the transmit mode, the ADDAG (U201) provides a serial digital-to-analog (D/A)
converter. The ADDAG (U201) also has a function in receive mode for special applications. The data
generated by the DSP is filtered and reconstructed as an analog signal to present a modulation
signal to the VCO (voltage-controlled oscillator). Both the transmit and receive data paths between
the DSP and ADDAG are through the DSP SSI port.
6881076C25-D
PATRIOT PATRIOT
SPI SPI
U300 U300
SSI SSI
GPIO GPIO
and your specific schematic diagram in Chapter 7.
Address/Data/ Address/Data/
Control Control
22.5k x 32 22.5k x 32
SRAM SRAM
DSP 56600 DSP 56600
3-39
FLASH FLASH
U301 U301
2M x 16 2M x 16
SRAM SRAM
U302 U302
256k x 16 256k x 16
October 28, 2002