Panasonic JS-170FR Series Service Manual page 73

Front counter register
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[Magnetic card Second Track Specification]
Total No. of clocks.................................................... Approx. 251 clocks (card as a whole)
Quantity of data ................................................ 5-bit × 40-digit = 200 bits (max.)
Bit configuration ................................................ 5 bits (4 bits for data, 1 bit for odd parity)
Start code ......................................................... B
End code .......................................................... F
Separation code................................................ D
Timing signal .................................................... In the spaces from the start to first data bit (start code) and from the end
Scan Codes Applicable to the PC/AT Keyboard (For the Second Track)
Readout data
0
1
2
3
4
5
6
7
8
9
A
B (Start code)
C
D (Separation code)
E
F (End code)
ENTER
data bit to the end, continuous binary codes "0" are recorded as the timing
signal.
1
2
45
F0
16
F0
1E
F0
26
F0
25
F0
2E
F0
36
F0
3D
F0
3E
F0
46
F0
12
1C
12
32
12
21
12
23
12
24
12
2B
5A
F0
2-43
Output scan code
3
4
45
16
1E
26
25
2E
36
3D
3E
46
F0
1C
F0
32
F0
21
F0
23
F0
24
F0
2B
5A
5
6
F0
12
F0
12
F0
12
F0
12
F0
12
F0
12

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