It8673F Pin Assignment - Panasonic JS-170FR Series Service Manual

Front counter register
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2.1.5.1

IT8673F Pin Assignment

Pin No.
Signal name
5
DENSEL#
6
MTR0#
7
DRV1#
8
DRV0#
9
MTR1#
11
FDDIR
12
STEP#
13
WDATA#
14
WGATE#
15
HDSEL
16
INDEX#
17
TRK0#
18
WPRT#
19
RDATA#
20
DSKCHG
21
A0
|
|
32
A11
91
A12
92
A13
33
IOCHRDY
34
SIRQ
36
PCICLK
37
IOR#
38
IOW#
39
D0
|
|
42
D3
44
D4
|
|
47
D7
48
RXD1
49
TXD1
50
DSR1#
51
RTS1#/PIN95SEL
52
CTS1#
53
DTR1#/PIN96SEL
54
RI1#
55
DCD1#
56
RI2#
57
DCD2#
58
RXD2
59
TXD2
60
DSR2#
61
RTS2#/KBC_IROM
62
CTS2#
63
DTR2#/KBCEN
IN/OUT
OUT (*)
FDD packing density select signal. High•500K/1Mbps ,Low•250K/300Kbps
OUT(*)
Motor enable signal to the FDD Drive 0.
OUT(*)
Select signal to the FDD Drive 1.
OUT(*)
Select signal to the FDD Drive 0.
OUT(*)
Motor enable signal to the FDD Drive 1.
OUT(*)
The
signal
to
Low → Step in, High → Step out.
OUT(*)
The signal to move the head during FDD seek.
OUT(*)
FDD write data signal.
OUT(*)
Write circuit enable signal for the drive that has seized the FDD.
FDD head select signal. Low → Head 1, High → Head 0.
OUT(*)
IN
The signal to indicate the first FDD track.
IN
Position signal for FDD Track 0.
IN
FDD write protect (write disable) signal.
IN
FDD read signal.
IN
The signal used to indicate that the FDD drive door is open.
System address bus.
IN
Address-latched signal.
OUT(*)
The signal that turns low when I/O address 210H is accessed.
IN/OUT
Serial interrupt signal.
IN
PCI clock for SIRQ sync.
IN
Read signal to the I/O device.
IN
Write signal to the I/O device.
System data bus.
IN/OUT
IN
COM1 serial input data.
OUT
COM1 serial output data.
IN
COM1 data set ready signal.
IN/OUT
COM1 send request signal.
Used at the high level with pin 95 for SA14 when the power supply is ON.
IN
COM1 send enable signal.
OUT
COM1 data terminal ready signal.
Used at the high level with pin 96 for SA15 when the power supply is ON.
IN
COM1 ring indicator signal.
IN
COM1 data carrier detect signal.
IN
COM2 ring indicator signal.
IN
COM2 data carrier detect signal.
IN
COM2 serial input data.
OUT
COM2 serial output data.
IN
COM2 data set ready signal.
OUT
COM2 send request signal.
Used at the high level with the KB controller's built-in ROM when the power
supply is ON.
IN
COM2 send enable signal.
Used to enable the KB controller at the high level when the power supply is ON.
OUT
COM2 data terminal ready signal.
2-16
Functions
specify
the
direction
of
Active : Low
Active : Low
Active : Low
Active : Low
the
FDD
head
movement.
Active : Low
Active : Low
Active : Low
Active : Low
Active : Low
Active : Low
Active : High
Active : Low
Active : Low
Active : Low
Active : Low
Active : Low
Active : Low
Active : Low
Active : Low
Active : Low
Active : Low
Active : Low
Active : Low
Active : Low
Active : Low

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