Sm710 Pin Assignment - Panasonic JS-170FR Series Service Manual

Front counter register
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2.1.7.1

SM710 Pin Assignment

Pin No.
Signal name
H 20
AD31
H 19
AD30
H 18
AD29
G 20
AD28
G 19
AD27
G 18
AD26
F 20
AD25
F 19
AD24
E 19
AD23
E 18
AD22
D 20
AD21
D 19
AD20
D 18
AD19
C 20
AD18
C 19
AD17
C 07
AD16
C 16
AD15
A 17
AD14
B 16
AD13
A 16
AD12
C 15
AD11
B 15
AD10
A 15
AD9
C 14
AD8
A 14
AD7
C 13
AD6
B 13
AD5
A 13
AD4
C 09
AD3
D 11
AD2
B 12
AD1
A 12
AD0
B 14
C/BE0#
B 17
C/BE1#
A 20
C/BE2#
F 18
C/BE3#
A 18
PAR
A 19
FRAME#
B 18
TRDY#
C 18
IRDY#
B 19
STOP#
C 17
DEVSEL#
E 20
IDSEL
J 20
PCICLK
K 18
RST#
J 18
REQ
J 19
GNT#
K 19
INTA#
Y 16
CKIN
K 20
REFCLK
L 17
MCKIN/LVDSCK
L 20
EXCKEN#
IN/OUT
PCI System address data bus.
IN/OUT
IN/OUT
PCI Command/ byte enable signal.
IN/OUT
PCI Bus parity signal
IN/OUT
PCI The signal used to indicate that the bus cycle is currently executed.
IN/OUT
PCI The signal used to indicate the status that the target can perform data transfer.
IN/OUT
PCI The signal used to indicate the status that the initiator can perform data
transfer.
IN/OUT
PCI Request signal from the target to the initiator for the suspension of execution.
IN/OUT
PCI Device select signal.
IN
PCI The signal used to specify the target device.
IN
PCI System clock 33MHz/30MHz
IN
PCI Asynchronous reset signal.
OUT
PCI Bus request signal.
IN
PCI Acknowledge signal to the REQ signal.
OUT
PCI Interrupt signal. Connected with PCIINTD#.
IN
VGA clock input. Fixed at 14.3181MHz
IN
Clock for suspend refresh. 32.768MHz
IN/OUT
Used as LVDSCK.
Clock select signal. Low → CKIN, High → MCKIN
IN
2-29
Functions
Active : Low
Active : Low
Active : Low
Active : Low
Active : Low
Active : Low

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