Panasonic JS-170FR Series Service Manual page 52

[Outline Operation of FDD]
(1) As an outline operation, an FDD is selected to make the motor run, provided that the signals of both DRV0# and MTR0# are
set at the low level.
(2) Each time the motor makes one revolution, an input of INDEX# signal is generated. This signal is used to identify that a
diskette is present.
(3) The SIDESEL0 signal is set at the high level to select Head 0. The DIR signal is set at the high level to turn the head
moving direction to the outer periphery.
(4) The STEP# signal (pulse) is output to move the head.
(5) The TRK0# signal is checked to confirm whether Track 0 has been detected. If detection fails, retrial from (4) is performed.
If Track 0 cannot be detected after the specified number of retries, such a condition is regarded as an error.
(6) When Track 0 is detected, the RDATA# signal is used to read out the data from Track 0.
(7) In the write mode, the WRPRT# signal is checked. If it is at the low level, writing is disabled. Otherwise, writing is enabled.
(8) The SIDESEL#, DIR, and STEP# signals are specified to move the head to the required track.
(9) The WGATE# signal is made to stay at the low level to enable the FDD writing circuit.
(10) The write data are output from the WDATA# signal.
(11) Upon completion of writing, the WGATE# signal is made to stay at the high level.
(12) The replacement of a diskette is identified with the DCHNG# signal.
[FDD Interface Connectors]
Pin Signal name
1 GND
3 +5V
5 GND
7 NC
9 DRATE0#
11 MTR0#
13 DENSEL
15 GND
17 GND
19 GND
21 GND
23 RDATA#
25 SIDESEL0
Pin Signal name
2 INDEX#
4 DRV0#
6 DCHG#
8 NC
10 +5V
12 DIR
14 STEP#
16 WDATA#
18 WGATE#
20 TRK0#
22 WRPRT#
24 GND
26 NC
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