MSI MS-6378 ATX User Manual page 55

Chapter 3
DRAM Clock
The chipset supports synchronous and asynchronous mode between host
clock and DRAM clock frequency. Settings are Auto, 100 and 133 (MHz).
Auto allows BIOS to determine the best DRAM clock frequency.
Memory Hole
In order to improve performance, certain space in memory can be reserved
for ISA cards. This memory must be mapped into the memory space below
16MB. When this area is reserved, it cannot be cached. The settings are
Enabled and Disabled.
P2C/C2P Concurrency
This field enables or disables the PCI to CPU and CPU to PCI concurrency
feature, which allows synchronous data transmission from PCI to CPU and
vice versa. Selecting the default Enabled will increase system performance.
Fast R-W Turn Around
This is used to control the fast read/write turn around feature for DRAM
timing. Settings are Enabled and Disabled. Enabled improves system
performance while Disabled provides stability.
System BIOS Cacheable
System BIOS ROM at F000h-F0000h is always copied to RAM for faster
execution. Selecting Enabled allows the contents of F0000h RAM memory
segment to be written to and read from cache memory, resulting in better
system performance. However, if any program writes to this memory area, a
system error may result. The settings are Enabled and Disabled.
Video RAM Cacheable
The field allows the caching of video memory, resulting in increased system
performance. Settings are Enabled and Disabled.
Frame Buffer Size
Frame Buffer is the video memory that stores data for video display (frame).
This field is used to determine the memory size for Frame Buffer. Larger
frame buffer size increases video performance. Settings are 2M, 4M and 8M.
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