LG FLATRON L1810T Service Manual page 37

SDA
Start/Stop
WP
SCL
Slave Address
Comparator
A0
A1
A2
Logic
Control Logic
Word Address
Figure 2-1. S524A40X10/40X20/40X40 Block Diagram
Row
Pointer decoder
D and ACK
OUT
HV Generation
Timing Control
EEPROM
Cell Array
128 x 8 bits
256 x 8 bits
512 x 8 bits
Column Decoder
Data Register