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Service Manual
CONTENTS
Specifications ................................................................... Top
Laser beam safety precaution .......................................... 1
Exploded view (cabinet and chassis) ............................... 1
Parts list ........................................................................... 2
IC block diagram and description ..................................... 4
Schematic diagram .......................................................... 8
Wiring diagram (Main A side) ........................................... 10
Wiring diagram (Main B side) ........................................... rear
Specifications
(CD player Section)
Channels .............................. 2 channels
S/N ratio ............................... 60 dB
Wow & Flutter ....................... Undetectable
Sampling frequency ............. 44.1kHz
Pickup light source ............... Semiconductor laser
Pickup wavelength ............... 790nm
Laser output ......................... Continuous wave max.
0.5mW
Portable Compact Disc
Player
Decode format ..................... 32kbps ~ 224kbps firing bit rate
Terminal impedance ............ Phones : 16 - 32 ohms
Power source ...................... DC : 4.6V (AC adaptor)
Dimensions .......................... Approx. 130 x 32 x 145 mm(W x H x D)
Weight .................................. Approx. 260g (without batteries)
Specifications subject to change without notice.
FILE .NO
CDP-M300
(CA)
(XE)
PRODUCT CODE No.
164 080 03 CDP-M300 (CA)
164 080 02 CDP-M300 (XE)
Line out : 47 kohms
DC : 3V (R6 x 2)
SM
REFERENCE No.
5810243
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Summary of Contents for Sanyo CDP-M300
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Page 1: Table Of Contents
CDP-M300 (CA) (XE) Player CONTENTS PRODUCT CODE No. 164 080 03 CDP-M300 (CA) 164 080 02 CDP-M300 (XE) Specifications ..............Top Laser beam safety precaution .......... 1 Exploded view (cabinet and chassis) ....... 1 Parts list ................2 IC block diagram and description ........4 Schematic diagram ............ -
Page 2: Laser Beam Safety Precaution
LASER BEAM SAFETY PRECAUTIONS • Pickup that emits a laser beam is used on this CD section. (XE) (XE) CAUTION – INVISIBLE LASER RADIATION WHEN OPEN AND INTERLOCKS DEFEATED. AVOID EXPOSURE TO BEAM. ADVARSEL – USYNLIG LASER STRÅLING VED ÅBNING, NÅR SIKKERHEDSAFBRYDERE ER UDE AF FUNKTION, UNDGÅ... -
Page 3: Parts List
645 050 0480 HEADER 16P, 645 037 5149 ST EARPHONE, FCC CONNECTOR ST TYPE CBX-15A L-TYPE PLUG(XE) 645 050 0497 HEADER 16P, 645 040 5242 ST HEADPHONE,SANYO(CA) FCC CONNECTOR ST TYPE 645 040 5204 WARE HOUSE PACK,1/6(CA) D0101 645 036 5546 DIODE RB100A,... - Page 4 PARTS LIST REF.NO. PART NO. DESCRIPTION IC502 645 031 1055 IC LA4533M, STEREO HEADPHONE AMP IC503 645 036 5782 IC BA4510F,OPERATIONAL AMP IC601 645 049 2938 IC MN101C38C CB5, MICROCONTROLLER IC701 645 049 2907 IC SPCA752A-03A, MPEG AUDIO DECODER IC703 645 049 2921 IC IS61LV6416 10T, HIGH SPEED COMS STATIC R IC705...
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Page 5: Ic Block Diagram And Description
IC BLOCK DIAGRAM & DESCRIPTION IC201 AN8789FB(4ch. Driver+DC/DC Coverter) Triangular Starter wave PWMG Max. value Starter Switching Initial Setting Power POWER Quick charge circuit Ripple CONT filter 23 14 11 IC502 LA4533M(Stereo Headphone AMP) IC703 IS61LV6416(CMOS Static RAM) POWER MUTE POWER MUTE SWITCH... - Page 6 IC BLOCK DIAGRAM & DESCRIPTION IC501 AK4352(2V & Low Power Multi Bit) DID0 DIF1 LRCK Serial Input 15 VCML BICK Interface SDATA 14 AOUTL Interpolator 13 AOUTR Interpolator De-emphasis Clock Divider 12 VCMR Control MCLK VREF Pin Name Function MCLK Master Clock Pin Power-Down Pin When at "L", the AK4352 is power-down mode and is held in reset.
- Page 7 IC BLOCK DIAGRAM & DESCRIPTION IC503 BA4510F(OP AMP.) IC706 NC7SZ125(Buffer with 3-State Output) Connection Diagram (Top View) Function Table Inputs Output IC706 SN74CBTLV1G125 In A Out Y (Low Voltage Single FET Bus Switch) H = HIGH Logic Level L = LOW Logic Level X = HIGH or LOW Logic Level Z = HIGH Impedence Slam IC301 AN8838SB(CD HEAD AMP)
- Page 8 IC BLOCK DIAGRAM & DESCRIPTION IC701 SPCA752A-03A(MPEG AUDIO DECODER) TADCEB OSCOUT SRAM TADSEL1 OSCIN Host Interface Clock Synthesizer TADSEL0 SPLCLK TADD[7:0] MPEG Audio Decoder CD_LRCK RESETB CD_BCK Voice Encoder/Decoder CDDSP CD_C2P0 CD_DATA AUD_LRCK External Memory Controller AUD_BCK Buffer AUD_DATA AUD_XCK WIRING CONNECTION SKIP+ MODE...
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Page 9: Schematic Diagram
SCHEMATIC DIAGRAM This is a basic schematic diagram. - 9 - - 8 -... - Page 10 WIRING DIAGRAM (MAIN A SIDE) - 10 -...
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Page 11: Wiring Diagram (Main A Side)
WIRING DIAGRAM (MAIN B SIDE) SANYO Electric Co., Ltd. Oct. / '01/ Printed in Japan Osaka, Japan...