Toshiba 20VL44 Service Manual page 53

IFIN+ IF
Frontend
IFIN-
CVBS in
YCrCb in Video
Frontend
RGB in
CVBS out
Slicer
24kB
Char ROM
20kB XRAM
Fig. 1–2: Block diagram of the VCT 49xxI
PSSDIP88-2 package
IF Sound
Processor Demodulator
Comb Color
Filter Decoder
Component
Interface
Bus Display
Arbiter Generator
CPU
8051
256kB Memory
Prog ROM Interface
ADB, DB, PSENQ,
PSWEQ, WRQ, RDQ
45
GND
46
VSUP3.3FE
P10 47
P11
48
P12 49
P13 50
P14 51
P15 52
P16 53
P17 54
P20 / DFVBL 55
P21 / PWMV 56
SCL 57
SDA 58
VPROT 59
60
HOUT
61
HFLB
62
SAFETY
63
GNDDAC
64
VSUP3.3DAC
65
VSUP3.3IO
66
GND
67
GND
68
VSUP3.3BE
XREF 69
VRD 70
BOUT 71
GOUT 72
ROUT 73
SVMOUT 74
BIN 75
GIN 76
RIN 77
FBIN 78
GNDM 79
SENSE 80
RSW1 81
RSW2 82
83
EW
84
VERT-
VERT+ 85
86
TEST
87
VSUP5.0BE
88
GND
Audio
Processor
Display &
Panorama
Deflection
Scaler
Processor
I2C Master/
Slave
Timer
CRT
PWM
ADC
UART
Watchdog
RTC
I/O-Ports
Pxy
44
GND
43
VSUP1.8FE
42
VOUT3
41 VOUT2
40 VOUT1
39 VIN1
38 VIN2
37 VIN3
36 VIN4
35 VIN5
34 VIN6
33 VIN7
32 VIN8
31 VIN9
30 VIN10
29
VIN11
28
P23
27
P22
26
XTAL2
25
XTAL1
24
VSUP1.8DIG
23
GND
22
GND
21
VSUP3.3DIG
20 VSUP5.0IF
19 GNDIF
18 RESETQ
17 IFIN+
16 IFIN-
15 VREFIF
14 TAGC
13 SIF / AIN1R
12 AIN1L
11 AIN2R
10 AIN2L
9 AIN3R / AOUT2R
8 AIN3L / AOUT2L
7 AOUT1R
6
AOUT1L
5
SPEAKERR
4
SPEAKERL
3
VREFAU
2
VSUP8.0AU
1
GND
PROT
HOUT
HFLB
VERT
EW
Video
SVM
Backend
RGB out
RGB in
SENSE
RSW
I2C
RESETQ
Reset & Test
Logic
TEST
Clock XTAL1
Generator
XTAL2