IBM L200P Service Manual page 29

THC63LVDM 83R
1
RS
2
TD1
3
TA 5
4
TA 6
5
GND
6
TB0
7
TB1
8
TD2
9
VCC
10
TD3
11
TB2
12
TB3
13
GND
14
TB4
15
TB5
16
TD4
17
R/F
18
TD5
19
TB6
20
TC0
21
GND
22
TC1
23
TC2
24
TC3
25
TD6
26
VCC
27
TC4
28
TC5
THC63LVDM 83R
CMOS/TTL
INPUTS
7
TA0-6
7
TB0-6
7
TC0-6
7
TD0-6
TRANSMITTER
CLOCK IN
PLL
(20 to 85MHz)
R/F
/PDWN
RS
THC63LVDM83R
56
TA 4
55
TA 3
54
TA 2
53
GND
52
TA 1
51
TA 0
50
TD0
49
LVDS GND
48
TA -
47
TA +
46
TB-
45
TB+
44
LV DS VCC
43
LVDS GND
42
TC-
41
TC+
40
TCLK-
39
TCLK+
38
TD-
37
TD+
36
LVDS GND
35
PLL GND
34
PLL VC C
33
PLL GND
32
/PDWN
31
CLK I N
30
TC6
29
GND
PIN CONFIGURATION
DATA
(LVDS)
TA +/-
TB +/-
TC +/-
TD +/-
(140-595Mbit/On Each
LVDS Channel)
TRANSMI TTER
TCLK +/-
CLOCK IN
(20 to 85MHz)
CLOCK
(LVDS)
20-85MHz
BLOCK DIAGRAM
THC63LVDM63R
1 48
TA 4
2 47
RS
3 46
TA 5
4 45
TA 6
5 44
GND
43
6
TB0
7 42
TB1
8
41
VCC
9
40
TB2
10
39
TB3
11 38
GND
12
37
TB4
13
36
TB5
14
35
R/F
15 34
TB6
16
33
TC0
17
32
GND
18
31
TC1
19 30
TC2
20 29
TC3
21
28
VCC
22 27
TC4
26
23
TC5
24 25
GND
THC63LVDM 63R
CMOS/TTL
INPUTS
7
TA0-6
7
TB0-6
7
TC0-6
PLL
R/F
/PDWN
RS
TA3
TA 2
GND
TA 1
TA 0
N/C
LV DS GND
TA -
TA +
TB-
TB+
LV DS VCC
LV DS GND
TC-
TC+
TCLK -
TCLK +
LV DS GND
PLL GND
PLL VCC
PLL GND
/PDWN
CLK I N
TC6
DATA
(LVDS)
TA +/-
TB +/-
TC +/-
(140-595Mbit/On Each
LVDS Channel)
TCLK +/-
CLOCK
(LVDS)
20-85MHz