Dell S1909WNf Service Manual page 11

C862
1000pF/1KV X7R
D854
D855
C873
1000pF/1KV X7R
I851
TL431
D854 is used to rectify the inducted current. R862 and C862 are used to store energy when
current is reversed. The parts including C863, C864, and R887 are used to smooth the current
waves that are from D854 and D855, and then 12V voltage is supplied. We can see, there have two
parts C862 and R862 paralleling with D857,they have two functions ,One is used to damp the peak
voltage of D857, the other is used for EMI.
D857 is used to rectify the inducted current. R873 and C873 are used to store energy when
current is reversed. The parts including C856, C857, C858 , C876 and L854 are used to smooth
the current waves that are from D857, and then 5V voltage is supplied.C873 and R873 have the
same function with C862 and R862.
In order to limit the 5V and 12V over Spec, we need a sampling circuit to accomplish this
function. At first, use R871 ,R872 and R868 this divider circuit to sample 2.5V, and comparing it to a
reference voltage 2.5,so we will get a differential signal witch can control the current of I851(TL431).
R860,C859 and C871 is frequency compensating circuit witch be able to control feedback loop
speed rate,R857 is else able to accomplish this function, and its main task is getting current for
I851 and I850
2.3 I/F Board Circuit (see the Attachment 2- Schematic)
2.3.1 RGB CAPTURE
- Signal RED,GREEN,BLUE input through CN102 #1,#2,#3, Stop DC via C113, C114 and
C115, and then enter into U105 (TSUM1PEJ-LF-2) analog input PIN #28,#25,#23, and then
TSUM1PEJ-LF-2 deals with signal internally. D103, D104, D105 are ESD protector to
prevent U105 from ESD.
- Signal DDC_SCL (series clock) inputs via CN102#15, and then passes through ZD106 for
ESD protection, goes into EDID EEPROM IC U103 #6.
- Signal DDC_SDA (series data) inputs via CN102#12, and then passes through ZD103 for
ESD protection, goes into EDID EEPROM IC U103 #5.
- Signal TTL vertical sync. (Vsync) inputs via CN102 #14, and then clamped by ZD105 Zener,
passes through R134, and then goes into IC U105 (TSUM1PEJ-LF-2) #33.
- Signal TTL horizontal sync. (Hsync) inputs via CN102 #13, and then clamped by ZD104
Zener, passes throughFB101 & R133, and then goes into IC U105 (TSUM1PEJ-LF-2) #32.
- CN102#5 is defined as cable detect pin, this detector realize via R113 and U105#36, and
D102 is ESD protector.
R862 L855
10R 2W NC/CHK-XXX
SR520
SR520
C863
470uF/25V
R873
10R 2W
D856 NC/SB5150
D857 SB5150
C858 C856
470uF/25V 470uF/25V
R857
270R
R858
NC/5K1 C871 0.1uF/50V
R860 C859
5K1 10nF/50V Y 5V
C864
470uF/25V
L854
CHK-XXX
C857
470uF/25V
R871 R872
270K 3.6K
R868
3.3K
fig.7
10
Service Manual
+12V
R887
20K
F851
+5V
5A/125V
C876
0.1uF/50V
CN853
+5V 1
+5V
2
+5V
3
GND
4
GND
5
ON/OFF
ENA
6
DIM
DIM
7
Audio_detect
8
Audio_on/of f
SIP-8P