Pin No.
Pin Name
164
CRADLE_DET
165
HIDC_MON
166
WK_DET
167
BATT_MON
168
HALF_LOCK_SW
169
RMC_KEY
170
JOG_PUSH
171
REC_KEY
172
END_SEARCH
173
RADIO_ON
174
RMC_DTCK
175
UDP
176
UDM
177
SUSPEND
178
UPUEN
179
UOSCI
180
UOSCO
181
SI3
182
SO3
183
SCK3
184
MSIN
185
MSOUT
186
MSCK
187
RF_POWER
188
LCD_POWER
189
SP_AMP
190
XHP_DET
191
SET_CODE0
192
SET_CODE1
193
SET_CODE2
194
SET_CODE3
195, 196
NC
197
VBUS5V_DET
198
LG_DCR_CTL
199
MUTE
200
CLV_PWR_SEL
201
CS_RTC
202 to 204
MODE1 to 3
205, 206
HD_CON_1, 2
207
TAT
208
TAN
209
NAR
210
IDO
211
SAK
212
XRST
213
TRST
214, 215
TEST0, 1
216 to 231
D0 to 15
232 to 245
A00 to 13
246
XCAS
I/O
I
USB cradle or battery case detection signal input (fixed at "H" in this set)
I
HIGH DC voltage monitor input (A/D input)
I
Set key WAKE detection signal input
I
External battery voltage monitor input (fixed at "H" in this set)
I
Open button detection switch input (A/D input) "L" : the open button is pressed
I
Key input (A/D input) from the remote commander
I
Jog dial push detection signal input Not used (connected to the ground)
I
REC key input (A/D input)
I
END SEARCH key input (A/D input) Not used (connected to the ground)
I
RADIO ON detection signal input Not used (connected to the ground)
I/O
TSB master data clock input/output or SSB data input/output
I/O
USB data (+) input terminal
I/O
USB data (-) input terminal
O
USB suspend signal output Not used (open)
O
USB pull-up resistor connection control output terminal
I
Resonator (48MHz) connection terminal for the USB oscillation circuit
O
Resonator (48MHz) connection terminal for the USB oscillation circuit
I
Not used (connected to the ground)
O
Not used (open)
I/O
Not used (open)
I
Not used (connected to the ground)
O
Not used (open)
I/O
Not used (open)
O
Power supply control signal output to the RF amplifier Not used (open)
O
Power supply control signal output to the liquid crystal display module
O
Built-in speaker control signal output "H": activate Not used (open)
I
Headphone jack detection signal input Not used (open)
I
Input terminal for the set (open in this set)
I
Input terminal for the set (open in this set)
I
Input terminal for the set (fixed at "L" in this set)
I
Input terminal for the set (fixed at "L" in this set)
O
Not used (open)
I
USB power supply voltage detection terminal 2 Not used (open)
O
LG DCR control signal output Not used (open)
O
Analog muting control signal output to the headphone amplifier "H": muting ON Not used (open)
O
CLV motor power supply selection control signal output Not used (open)
O
Chip select signal output to the real time clock
O
Power supply control signal output for the over write head to the REC driver
O
Over write head control signal output to the REC driver
I
Not used (open)
I
Not used (open)
I
Not used (open)
I
Not used (open)
O
Not used (open)
I
System reset signal input from the power control "L": reset
I
Terminal for the test mode setting (normally fixed at "L")
I
Input terminal for the main test (normally fixed at "L")
—
DRAM data0 to 15 terminal Not used (open)
—
DRAM address0 to 13 terminal Not used (open)
—
DRAM CAS terminal Not used (open)
Description
MZ-N910
53