Table of Contents
Advertisement
Automatic ADC Sampling Phase Optimization
-Performs measurements so that firmware can automatically optimize the ADC s ampling
phase.
Optimized Panel Clock
-Panel clock frequency is optimiz ed to support each mode at the lowest possible
frequency. 1280 x 1024 x 75HZ is supported without driving the panel clock at 135Mhz.
-Panel clock pad drive strength and clock to data skew are programmable to reduce EMI
in the panel interface cable.
TFT LCD Panel Support
-All panel resolutions and sizes are supported up to SXGA- Panel interface supports one
or two pixel per clock, Sync only, DE only and Sync/DE composite. Four Wire Interface
to Micro-controller Simple 4 wire serial interface connects directly to monitor micro-
controller. . Can be expanded to 7 wires by increasing data width from 1 to 4.
LVDS Transmitter
There are on board LVDS (Low Voltage Differential
Signaling) transmitter ICs to convert CMOS/TTL data
into LVDS data stream. Since the LCD display has
its own LVDS receiver, there are 4 kinds of on board
LVDS transmitter: 1 channel 6Bits; 1 channel 8Bits;
2 channel 6Bits and 2 channel 8Bits. The built-in
transmitter ICs will depend on the LCD display. Also
some LCDs are not supported by the on board ICs,
there may come with a pluggable daughter board
with transmitter ICs to use it.
Backlight Inverter
The subassembly comes with an inverter subsystem that converts the supplied DC power to
high DC voltage for the LCD backlight.
Caution: The output of the inverter is a very high voltage, do not touch it anyway.
To main board 5 or 6
DC output to cold cathode fluorescent backlight
Advertisement
Chapters
Table of Contents
