Table of Contents
Advertisement
~
If:::(f(g)(Id!!)(fj)
_
_ _ _ _
--'D'C-'-'75'-'PO~W!"E":'R~A""M":P,o,L1F':"=cER~
_ _
__
_ _
__ _ _
~A!OEV~.
0
The following
explanation
refers
10
schematic diagram
MI-270b
located
in
the Instruction
Manual as well as al
theend of Section 9.
However,
each circuil under
discussion is reprinted below in order
to
aid in
circuit
familiarization.
Only channell
is
shown for
simplicity.
6.2. Balanced/Unbalanced
Input Stage
In
order
to
eliminate annoying RF interference, balanced
input
(as well as unbalanced)
stages
ate
iocorporalCd
in
the 0-75. U2A
and
U2B
are the balanced input op amps
which
provide the
correct phase
inversion
used
in
balanced input design. As per definition of a balanced
input
signaJ
,
an
input
from a balanced
line is
fed 10 the
inverting
(-)
and non-inverting
(+)
inputs
of
U2A
(pins
2
and
3).
This has
the
effect
of driving
the
inputs
J
80
degrees out
of
phase.
1be
output
signal
will now
be
unbalanced and
in
phase with the
signal
applied 10
pin
3,
but without any annoying noise
lIlal
may
have
been
present at the input.
The
reason for this is because
unlike
the
audio input
signal,
the
noise
signal
produced
(by
some c:\temal
source) will appear on both
sides
oflhe
balanced line and will cancel each other at the op amp
output Note the
following
diagram.
IDa
' ' ' ' ' ' ' '
Balanced
"' , ,"'
el2S
82PF
I
9 .9K
9.9K
Fig. 6.2 Balanced
Input
Stage
6.3.
Input
Operational
Amplilier
The input
op
amp, UlOO is a
low
noise. large
gain
bandwidlh
integrated
circuit.
Under
its formal name, LF
6-2
Circuit
Theory
357,
it
acts
as an input
voltage
amplifier producing
emcme1y
low
distortion by means of
several feedback
paths. The
gai
n
dctcrmining
components for
this
stage arc
two voltagc dividing resistors, RI03 and RIOS.
Note
that
lhcy act as
a feedback palh
from
lhc
output
ofUlOO (pin
6)
to
lhc
inverting
input
of
U
100
(pin
2).
Both
signals
cntering U
100 al
pin
3 will be
in
phase
with
each
othcr
because of lhis
feedback
path and will thus produce an
output
(pin
I)
of
almost
zero.
Thc
small
amount
of
output
signal
that is prescnt is
thcre
because
of
the
slight
diffcrence
in
ohmic
value
(with respect
to
gain)
of
voltagc
divider,
RIDS and R103.
cIa,
25
N
:; R102
'K
- l
.
~1O~
±
Rl04
200PFT
10K
7
R'03
' "
.5W
'"
0110
0109
:'f
*
~,
•
C~f
-1~V
"
~
_
RIS1
.~
-
9.53K RI52
;
i'
'"
OPEN
Fig. 6.3 Input Operational Amplifier
C'06
27PF
R'08
toK
.5W
The
IC
op
amp
will
always
try
to
keep
a zero
potential
difference between
bolh
inputs. Any type of non-linearity
will
cause
the
OJ>
amp
to
produce
a
large
output, and
lhcrfore a
substantial size
correction
signal
in order
to
retain the
small output
level.
6.4. Signal Translator
The opcmtion of
the
D-75 front-end circuitry (IC
op
amp
through QI02)
is to
basically provide voltage
amplification. However,
lhe signailfanslatOf
transistor
(Q IOO)
provides no
voltage
amplification itself, but
rather
converts
the
ground
referenced input
signal to a
signal
with a reference
to the
negative
supply.
The
result
is
highcr voltage swing capabilities
from QI02 (Final
Voltage
Amplifier).
"'"
3
Ul(l(l
>-,-
--ka,co,,£!
Fig. 6.4 Signal Translator
C"r
"
r
Hide quick links:
Advertisement
Table of Contents
