Harman Kardon AVR 70/230 Service Manual page 54

No. Pin Name
55 AVDD
56 AVSS
57 RX0
58 NC
59 RX1
60 TEST1
61 RX2
62 NC
63 RX3
64 PVSS
65 R
66 PVDD
67 RX4
68 TEST2
69 RX5
70 CAD0
71 RX6
72 CAD1
73 RX7
74 I2C
75 DAUX2
76 VIN
77 MCLK
78 TX0
79 TX1
80 INT0
Note:
MS0287-J-03
I/O
Analog Power Supply Pin, 4.5V∼5.5V
-
Analog Ground Pin, 0V
-
I Receiver Channel 0 Pin (Internal biased pin. Internally biased at PVDD/2)
No Connect pin
-
No internal bonding. This pin should be connected to PVSS.
I Receiver Channel 1 Pin (Internal biased pin. Internally biased at PVDD/2)
Test 1 Pin
I
This pin should be connected to PVSS.
I Receiver Channel 2 Pin (Internal biased pin. Internally biased at PVDD/2)
No Connect pin
-
No internal bonding. This pin should be connected to PVSS.
I Receiver Channel 3 Pin (Internal biased pin. Internally biased at PVDD/2)
- PLL Ground pin
External Resistor Pin
-
12kΩ +/-1% resistor should be connected to PVSS externally.
- PLL Power supply Pin, 4.5V∼5.5V
I Receiver Channel 4 Pin (Internal biased pin. Internally biased at PVDD/2)
Test 2 Pin
I
This pin should be connected to PVSS.
I Receiver Channel 5 Pin (Internal biased pin. Internally biased at PVDD/2)
Chip Address 0 Pin (ADC/DAC part)
I
I Receiver Channel 6 Pin (Internal biased pin. Internally biased at PVDD/2)
Chip Address 1 Pin (ADC/DAC part)
I
I Receiver Channel 7 Pin (Internal biased pin. Internally biased at PVDD/2)
Control Mode Select Pin.
I
"L": 4-wire Serial, "H": I
I Auxiliary Audio Data Input Pin (DIR/DIT part)
I V-bit Input Pin for Transmitter Output
Master Clock Input Pin
I
O Transmit Channel (Through Data) Output 0 Pin
Transmit Channel Output1 pin
O When TX bit = "0", Transmit Channel (Through Data) Output 1 Pin.
When TX bit = "1", Transmit Channel (DAUX2 Data) Output Pin (default).
O Interrupt 0 Pin
PVDD
20k(typ)
RX pin
20k(typ)
PVSS
Internal biased pin Circuit
Function
2
C Bus
VCOM
- 8 -
[AK4588]
2009/05