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IC,MN662728RPT1
Pin No.
Pin Name
1
DVDD
2 ~ 3
D0 ~ 1
4
NWE
5
NRAS
6 ~ 7
D2 ~ 3
8
NCAS0
9
NCAS1
10 ~ 14
A8 ~ 4
15
A9
16 ~ 19
A0 ~ 3
20
DVSS2
21
DVDD2
22
SPOUT
23
TRVM
24
TRVP
25
TRM
26
TRP
27
FOM
28
FOP
29
FBAL
30
TBAL
31
VREF
32
FE
33
TE
34
RFENV
35
OFT
36
NRFDET
37
BDO
38
LDON
39
ARF
40
IREF
41
ADPVCC
42
DSLF
43
DSLF2
44
PLLF
45
VCOF
46
AVDD2
47
AVSS2
48
OUTL
I/O
-
DRAM interface power (terminal No. 2 to 19).
I/O
DRAM data input/output signal 0 ~ 1.
O
DRAM write enable signal.
O
DRAM RAS control signal.
I/O
DRAM data input/output signal 2 ~ 3.
O
DRAM CAS control signal 0.
DRAM CAS control signal 1 ( when 1M or 4M x2 are used).
O
DRAM address signal 10 (when 16M DRAM is used).
O
DRAM address signal 8 ~ 4.
O
DRAM address signal 9.
O
DRAM address signal 0 ~ 3.
I
Digital circuit GND.
I
Digital circuit power.
O
Spindle motor driver signal output.
O
Traverse drive output (+ polar output).
O
Traverse drive output (- polar output).
O
Tracking drive output (+ polar output).
O
Tracking drive output (- polar output).
O
Focus drive output (+ polar output).
O
Focus drive output (- polar output).
O
Focus balance adjustment output.
O
Tracking balance adjustment output.
I
DA output reference voltage (FBAL, TBAL, DSLF2).
I
Focus error signal input (analogue input).
I
Tracking error signal input (analogue input).
I
RF envelope signal input (analogue input).
I
Off track signal input. "H" = Off track.
I
RF detection signal input. "L" = Detected.
I
Drop out signal input. "H" = Drop out.
O
Laser ON signal output. "H" = ON.
I
RF signal input.
I
Reference current input terminal.
I
AD reference voltage input (analogue input).
O
DSL loop filter terminal.
O
DSL unbalanced current correction.
O
PLL loop filter terminal.
O
Jitter free VCO loop filter terminal.
I
Analogue circuit power. (for DSL, PLL, VCOF, AD, DA).
I
Analogue circuit GND. (for DSL, PLL, VCOF, AD, DA).
O
Lch audio output.
Description
- 21 -
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