Page 1 Training Manual 50PS80 Plasma Display 50PS80 Plasma Display Advanced Single Scan Troubleshooting August 2009...
Page 2 • Z SUS Output Board (Connects directly with FPC to Panel) • Control Board Receives its 5V from Power Supply, not Y-SUS • X Drive Boards (3) • Main Board • Power Button (Front Key Board) Turns off the SMPS via Key On line. August 2009 Plasma 50PS80...
Page 3 Layout of the Plasma Display Panel. At the end of this Section the Technician should be able to Identify the Circuit Boards and have the ability and knowledge necessary to safely remove and replace any Circuit Board or Assembly. August 2009 Plasma 50PS80...
Page 4: Preliminary Matters (The Fine Print)
When servicing this product, under no circumstances should the original design be modified or altered without permission from LG Electronics. Unauthorized modifications will not only void the warranty, but may lead to property damage or user injury. If wires, screws, clips, straps, nuts, or washers used to complete a ground path are removed for service, they must be returned to their original positions and properly fastened.
Page 5: Esd Notice
Increase the separation between the equipment and the receiver; Connect the equipment to an outlet on a different circuit than that to which the receiver is connected; or consult the dealer or an experienced radio/TV technician for help. August 2009 Plasma 50PS80...
Page 6: Contact Information
New Training Materials on Alignment Handbook Plasma page Plasma page the Learning Academy site the Learning Academy site Published August 2009 by LG Technical Support and Training LG Electronics Alabama, Inc. 201 James Record Road, Huntsville, AL, 35813. August 2009 Plasma 50PS80...
Page 7 1. Check the appearance of the Replacement Panel and Circuit Boards for both physical damage and part number accuracy. 2. Check the model label. Verify model names and board model matches. 3. Check details of defective condition and history. Example: Y Board Failure, Mal-discharge on screen, etc. August 2009 Plasma 50PS80...
Page 8: Basic Troubleshooting Steps
The final step is to correct the problem. Be careful of ESD and make sure to check the DC Supplies for proper levels. Make all necessary adjustments and lastly always perform a Safety AC Leakage Test before returning the product back to the Customer. August 2009 Plasma 50PS80...
Page 9 PRODUCT INFORMATION: PRODUCT INFORMATION: This section of the manual will discuss the specifications of the 50PS80 Single layer design. The 1080p Full HD resolution and THX Display certification makes this series the must have HDTV in 2009. August 2009 Plasma 50PS80...
Page 10: Specifications
•USB 2.0 for access to digital music and photos (MP3, JPEG) •LG SimpLink(TM) Connectivity •Smart Energy Saving •LG Core Technologies •Clear Voice •Easy UI menu interface •Pure Black Level •Auto Navigation: (VCR, DVD, Bluray, HD DVD, SetTop Box, Satellite, Cable Box, Game, PC) •Input Labeling August 2009 Plasma 50PS80...
Page 11 •EZ Menus (High Performance Interface) •Channel Add/Delete •Favorite Channel •Auto Clock •Manual Clock •On/Off Timer •Sleep Timer •SimpLink™ •Auto Off (When no video is present) •Image Sticking Minimization •100,000 Hour Panel Life (typical) •NTSC/ATSC Tuners with Clear QAM August 2009 Plasma 50PS80...
Page 12 10.2Gbps) than that of HDMI 1.2, delivering a broader range of colors, and also drastically improves the data-transmission speed. Invisible Speaker Personally tuned by Mr. Mark Levinson for LG TAKE IT TO THE EDGE newly introduces ‘Invisible Speaker’ system, guaranteeing first class audio quality personally tuned by Mr. Mark Levinson, world renowned as an audio authority.
Page 13: Specifications Logo Familiarization Broad Band Tv
User friendly interface • Content service from Yahoo, Netflix, YouTUBE • Widget service from Yahoo! • ‐ Weather, VoD, shopping and information FIXED: Yahoo! News, Yahoo! Weather, Yahoo! Finance, Yahoo! Video, • Yahoo! Sports, Flicker, OMG August 2009 Plasma 50PS80...
Page 14 Specifications Logo Familiarization (Picture Wizard) Specifications Logo Familiarization (Picture Wizard) Picture Wizard easily guides consumers through the calibration process using on-screen reference points. Customers can customize picture performance without the need for additional expense. August 2009 Plasma 50PS80...
Page 15 60% less energy to perform these functions, while providing the same performance at the same price as less-efficient models. Less energy means you pay less on your energy bill. Draws less than 1 Watt in stand by. August 2009 Plasma 50PS80...
Page 16: 600Hz Sub Field Driving
10 are • through 10 are actually in reverse. actually in reverse. Brighter image Brighter image should be last. should be last. Sub Field firing occurs using wall charge and polarity differences between Y-SUS and Z-SUS signals. August 2009 Plasma 50PS80...
Page 17: Thx Familiarization
Dazzling ‘visual and sound’ performance (certified by THX) • LG is one of the first consumer electronics companies to achieve THX Display Certification. An industry benchmark for video quality, THX Display Certification signifies that an HDTV delivers exceptional images, bringing more immersive movie, broadcast and video game experiences to your living room.
Page 18: Remote Control
Remote Control Remote Control TOP PORTION BOTTOM PORTION August 2009 Plasma 50PS80...
Page 19 4) The Service Menu appears Note: It is possible, dependant upon the Software Version, a Password may be required to enter the Service Menu. If a password is required, enter 0000 August 2009 Plasma 50PS80...
Page 20: Rear And Side Input Jacks
Rear and Side Input Jacks Rear and Side Input Jacks AC In Music/Pictures and Software Upgrades LAN also for Software Upgrades August 2009 Plasma 50PS80...
Page 21: Usb Download
4) You can see the message “ ” TV Software Upgrade Shows the Shows the Currently Installed Software file Version found on the USB Shows the Flash Drive Software Version found on the USB Flash Drive August 2009 Plasma 50PS80...
Page 22 50PS80 Dimensions 50PS80 Dimensions Power: There must be at least 4 inches of Clearance on all sides 3-1/8" 282W (Typical) 48-5/16" 78.7mm 0.13W (Stand-By) 1226.8mm 6-5/16" 160mm 15-3/4" 400mm 16-5/16" 415mm 32-7/8" 15-3/4" 15-3/4" 835.7mm 400mm 400mm Model No. Serial No.
Page 23 DISASSEMBLY SECTION This section of the manual will discuss Disassembly, Layout and Circuit Board Identification, of the 50PS80 Advanced Single Scan Plasma Display Panel. Upon completion of this section the Technician will have a better understanding of the disassembly procedures, the layout of the printed circuit boards and be able to identify each board.
Page 24: Removing The Back Cover
Removing the Back Cover Removing the Back Cover To remove the back cover, remove the 29 screws indicated by the arrows. (The Stand does not need to be removed). PAY CLOSE ATTENTION TO THE TYPE, SIZE AND LENGTH Of the screws when replacing the back cover. Improper type can damage the front.
Page 25: Circuit Board Layout
Y SUS PWB Z-SUB Side Input (part of main) Y Drive Lower Control PWB AC In Main PWB Control Keys Heat Sink Center “X” Right “X” Left “X” Power Button Conductive Tape Under Main PWB Invisible Speakers August 2009 Plasma 50PS80...
Page 26 SMPS (Switch Mode Power Supply) PWB Removal SMPS (Switch Mode Power Supply) PWB Removal Disconnect P811, P812, P813 and SC101 Then Remove the 8 Screws P812 P811 P813 SC101 August 2009 Plasma 50PS80...
Page 27 Main PWB Removal Main PWB Removal P203 Disconnect P1101, P1108 and P900 P1108 Disconnect P203 by lifting up the locking mechanism and removing the LVDS ribbon cable. P1101 Then Remove the 4 Screws P900 August 2009 Plasma 50PS80...
Page 28 Disconnect P1, P101, P102 and P104 by removing the tape and lifting upward on the locking tab pulling the cable out. Then Remove the 4 Screws P200 Look on back Look on back for heat transfer for heat transfer material material P101 P104 P102 August 2009 Plasma 50PS80...
Page 29 Disconnect P101 and P309 by removing the tape and lifting upward on the locking tab P309 pulling the cable out. Then Remove the 10 Screws Carefully separate the Y-SUS from the Y-Drive Upper and Lower Boards. P101 August 2009 Plasma 50PS80...
Page 30 Upper or Lower Y Drive Drive Carefully separate boards and resolder if boards and resolder if the Y-Drive from necessary. necessary. the Y-SUS Boards which is P114 connected via P114 and P103 P116. P116 P111 P104 P112 August 2009 Plasma 50PS80...
Page 31 Upper or Lower Y or Upper or Lower Y Drive Drive Carefully separate boards and resolder if boards and resolder if the Y-Drive from necessary. necessary. the Y-SUS Boards which is connected via P214 and P203 P216. P204 August 2009 Plasma 50PS80...
Page 32 Disconnect P102 and P104 P104 by pulling out (to the right) the locking tabs and removing the FPC from the connector. Then Remove the 8 Screws P101 Carefully separate the Z-SUS from the Z-SUB P103 and remove. P102 P100 August 2009 Plasma 50PS80...
Page 33: Removing Front Power Led And Ir Board
Make sure to return it when reinstalling the lug. Make sure to return it when reinstalling the Oversized washer which board. This ground snaps into the Bottom Metal. board. This ground snaps into the Bottom Metal. locks the board in place. August 2009 Plasma 50PS80...
Page 34 Disconnect all TCP ribbon cables from the defective X-Drive PWB. Remove the 5 screws holding the PWB in place. Remove the PWB. Reassemble in reverse order. Recheck Va / Vs / VScan / -VY / Z-Bias. August 2009 Plasma 50PS80...
Page 35: Getting To The X Circuit Boards
Getting to the X Circuit Boards Warning: Never run the TV with the TCP Heat Sink removed Right Left Heat Sink Warning Shorting Hazard: Conductive Tape under the Main board. Do not allow to touch energized circuits. August 2009 Plasma 50PS80...
Page 36 At the end of this Section the technician should understand the operation of each circuit board and how to adjust the controls. The technician should be able with confidence to troubleshoot a circuit board failure, replace the defective circuit and perform all necessary adjustments. August 2009 Plasma 50PS80...
Page 37 50PS80 SIGNAL and VOLTAGE DISTRIBUTION DIAGRAM 50PS80 SIGNAL and VOLTAGE DISTRIBUTION DIAGRAM Y Drive Display Panel Upper 5VFG indicates Grids Address SMPS OUTPUT VOLTAGES IN STBY SMPS OUTPUT VOLTAGES IN RUN FPCs measured from Reset STB5V, +5V, 17V, 12V to Main PWB...
Page 38 (4) Adjusting Voltage DC, Va, Vs (12) Model Name (5) Adjusting Voltage (Set Up / -Vy / Vsc / Ve / Vzb) (13) Max. Watt (Full White) (6) Trade name of LG Electronics (14) Max. Volts (7) Manufactured date (Year & Month) (15) Max. Amps...
Page 39: Adjustment Order
1) When the Y-SUS PWB is replaced All label references are from a specific panel. 2) When a “Mal-Discharge” problem is encountered They are not the same for every panel encountered. 3) When an abnormal picture issues is encountered August 2009 Plasma 50PS80...
Page 40: Switch Mode Power Supply Pwb Section
SUS) to the X boards for TCPs. • VA (through Y SUS) to the X boards for TCPs. • M5V to the Control, Y SUS and Z SUS boards. • M5V to the Control, Y SUS and Z SUS boards. August 2009 Plasma 50PS80...
Page 41: Switch Mode Power Supply Overview
5V VCC is pre-adjusted and fixed. All adjustments are made with relation to Chassis Ground. Use “Full White Raster” 100 IRE. Each panel has its own adjustment values for Va and Vs. Use the Panel’s Voltage Label for reference. RV901 Adjustments RV501 August 2009 Plasma 50PS80...
Page 42 SMPS (Switch Mode Power Supply) PWB Layout Hot Ground Symbol P811 P812 Y-SUS Vs Adj VR901 Z-SUS Va Adj VR501 P813 F801 1~4 M5V 4A/250V Control 5~8 Gnd F302 IC701 1A/250V SK101 P814 Fuse F101-2 Main 15A/250V August 2009 Plasma 50PS80...
Page 43: Power Supply Basic Operation
(opened), it pulls up and turns the Sub Micon IC701 on in the Auto mode. In this state, the Sub Micon turns on the power supply in stages automatically. A load is necessary to regulate the 17V with the SMPS disconnected. This is a good test if the Main board is suspect. August 2009 Plasma 50PS80...
Page 44 50PS80 POWER SUPPLY START UP SEQUENCE 50PS80 POWER SUPPLY START UP SEQUENCE In Stand-By Primary side is 163V Standby 5V will not In Run (Relay On) Primary side is 386V be output if the Power Button is off. AC In...
Page 45: Smps Adjustments
Connect DVM to pin 1 or 2 of P812. Adjust VR901 until the voltage matches your panel’s voltage label. 2) VA ADJUST: Connect DVM to pin 6 or 7 of P812. Adjust VR501 until the voltage matches your panel’s voltage label. August 2009 Plasma 50PS80...
Page 46 50PS80 SMPS STATIC TEST UNDER LOAD 50PS80 SMPS STATIC TEST UNDER LOAD Using two 100 Watt light bulbs, attach one end to Vs and the other end to ground. Apply AC to SC101. If the light bulbs turn on and VS is the correct voltage, allow the SMPS to run for several minutes to be sure it will operate under load. If this test is successful and all other voltages are generated, you can be fairly assured the power supply is OK.
Page 47 50PS80 Power Supply Troubleshooting 50PS80 Power Supply Troubleshooting Using two 100 Watt light bulbs, attach one end to Vs and the other end to ground. Apply AC to SC101. If the light bulbs turn on and VS is the correct voltage, allow the SMPS to run for several minutes to be sure it will operate under load.
Page 48 * Pin 24: When the Power Button is opened, • Pin 24 pulls up to 4.3V. • Stand-By turns off. AC-Det remains. Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. August 2009 Plasma 50PS80...
Page 49 Open Open *65V Open Open 0.74V 0.86V 0.74V 0.86V * Note: This voltage will vary in accordance with Panel Label Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. August 2009 Plasma 50PS80...
Page 50: P812 Pin Id And Voltages
*65V Open Open 0.74V 0.86V 0.74V 0.86V * Note: This voltage will vary in accordance with Panel Label Diode Mode Readings taken with all connectors Disconnected, Unless specified. Black lead on Gnd. DVM in Diode Mode. August 2009 Plasma 50PS80...
Page 51: P813 Connector Pin Id And Voltages
Diode Mode Label STBY Connected 0.75V 0.75V 0.75V 0.75V NOTE: The Black wire on P813 Connector is not pin 1. Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. August 2009 Plasma 50PS80...
Page 52: Y - Sus Pwb Section
• 2 DC: VSC AND –Vy • 2 Waveform: Set-Up and Set-Dn Board Receives its main B+ from the: Board Receives its main B+ from the: • Switch Mode Power Supply sends VS • Switch Mode Power Supply sends M5V August 2009 Plasma 50PS80...
Page 53 Top 6 pins 17.8V (out) P313 Adj VR602 Logic Signals (in) P101 Set-Dn1 Y Drive To Control Adj VR601 Lower -Vy Adj VR902 P314 P307 FS901 (5V) -Vy TP Vsc Adj 4A/125V To Left X R305 VR901 Pins 1~4 Va August 2009 Plasma 50PS80...
Page 54 50PS80 (50H3 Panel) 50PS80 (50H3 Panel) P312 Y-SUS PWB LAYOUT Y-SUS PWB LAYOUT FS302 P302 FS303 P311 FS301 P309 R306 VSC TP P313 VR602 SET-up1 VR601 P101 SET-dn1 P314 (-) (+) VR902 DD_Var (-Vy) FS901 R305 -VY TP VR901 VSCAN...
Page 55 Match your specific Panel’s Voltage label ±1V. 5) Adjust VSC using VR901. Measured across VSC TPs R306. Location Lower left Match your specific Panel’s Voltage label ±1V. VSC VR901 Location Bottom Center VSC TP R306 Location Lower Center August 2009 Plasma 50PS80...
Page 56: Y - Drive Signal Test Points
Either test point is OK to use. 50uS 510V p/p NOTE: The Waveform Test Points are fragile. If by accident the land is torn and the run lifted, make sure there are no lines left to right in the screen picture. August 2009 Plasma 50PS80...
Page 57 SET-UP or SET-DOWN FIG3 Area to Note: When actually performing the adjustments, 50uS be adjusted The portion of the waveform being adjusted can be Zoomed in on by increasing the speed of the scope. Set Down August 2009 Plasma 50PS80...
Page 58 CCW will cause the peak to decrease in amplitude. Lower Center Of PWB Turn CW until the dome appears, then back off CCW. 4) SET-DOWN ADJUSTMENT VR601: Adjust VR601 while observing area (B) and set to 160uSec ± 5uSec. August 2009 Plasma 50PS80...
Page 59 To correct, remove the LVDS from control All Waveforms taken at 50V per/div, 50uSec per/div PWB and make necessary adjustments. Ramp (Vset UP) too high Vset DN too high Ramp (Vset UP) too low Vset DN too low August 2009 Plasma 50PS80...
Page 60: Y Sus Block Diagram
Center X Board To Horizontal Electrodes Y Drive Board Display Panel Right X Board Receives Scan Waveform Operates referenced to Floating Gnd Logic signals needed to generate drive waveform To Vertical Electrodes R, G, B Logic and 3.3V August 2009 Plasma 50PS80...
Page 61 *65V Open Open 0.74V 1.14V 0.74V 1.14V * Note: This voltage will vary in accordance with Panel Label Diode Mode Readings taken with all connectors Disconnected unless specified. Black lead on Gnd. DVM in Diode Mode. August 2009 Plasma 50PS80...
Page 62 Diode Mode *65V Open *65V Open *65V Open *65V Open * Note: This voltage will vary in accordance with Panel Label Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. August 2009 Plasma 50PS80...
Page 63 Y-SUS P101 to Control P1 Y-SUS P101 to Control P1 Pin 50 on Y-SUS is Pin 1 on Control Connector Layout Connector Layout Top 25 Pins Bottom 25 Pins P101 P101 Y-SUS PWB Control PWB Y-SUS PWB Control PWB 17.8V 0.7V 17.8V DELTA_VY_ON_OFF...
Page 64: Y - Sus P101 To Control P1 Connector Information
1.4V 1.44V DATA_ODD 1.44V DELTA_VY2 0.7V 1.44V DATA_EVEN 1.44V ER_UP 0.2V 1.44V 4.3V 1.44V ER_DN 0.1V 1.44V OC2_EVEN 2.8V 1.44V SUS_UP 0.1~0.4V 1.44V SUS_DN 1.44V OC1_EVEN 1.85V 1.44V Voltage and Diode Mode Measurement (No Stand-By Voltages) August 2009 Plasma 50PS80...
Page 65 P313 P313 P311 P311 VSCAN VSCAN Floating Floating 5V FG 5V FG Ground Ground Floating Floating 5V FG 5V FG Ground Ground VSCAN VSCAN Diode Check means the Digital Volt Meter is in Diode Mode. August 2009 Plasma 50PS80...
Page 66 “Lower Y-Drive " P216 All Pins are Floating Ground 5VFG 1.3V 6~12 *FGnd FGnd FGnd * Note: (FGnd) Floating Ground Diode Mode Readings taken with all connectors Disconnected. Black lead on Floating Gnd. DVM in Diode Mode. August 2009 Plasma 50PS80...
Page 67: Y Drive Upper And Lower Pwb Section
SUS board. • Y Scan signal (over 500V peak/peak from the Y SUS board. • Logic signals from the Control board, routed through Y SUS. • Logic signals from the Control board, routed through Y SUS. August 2009 Plasma 50PS80...
Page 68 SUS or Upper the Y SUS or Upper or Lower Y Drive or Lower Y Drive P116 P116 boards and resolder boards and resolder if necessary. if necessary. P204 P204 P104 P104 P112 P112 P111 P111 August 2009 Plasma 50PS80...
Page 69: Y Drive Upper And Lower Pwb Connector Information
1 and 2. P112 P112 All control signals All control signals input from Y input from Y P111 P111 All control signals for All control signals for lower Y Drive board lower Y Drive board August 2009 Plasma 50PS80...
Page 70 The board must screw hole. The board must be lifted up slightly to clear be lifted up slightly to clear these collars before it can be these collars before it can be Chocolate Chocolate removed. removed. August 2009 Plasma 50PS80...
Page 71: Y Drive Removing The Flexible Printed Circuits
When reinserting the FPC, make certain that FPC, make certain that both tabs are seated both tabs are seated correctly before correctly before attempting to lock attempting to lock No Gap (Tab seated) No Gap (Tab seated) August 2009 Plasma 50PS80...
Page 72 VSCAN Floating 5V FG Floating 5V FG Ground Ground Floating Floating 5V FG 5V FG Ground Ground VSCAN VSCAN Diode Check means the Digital Volt Meter is in Diode Mode, all connectors to PWB are removed. August 2009 Plasma 50PS80...
Page 73 "Y-Drive" to “Y-SUS" P314 5VFG Open All Pins are Floating Ground 11~12 VScan 140V Open * Note: (FGnd) Floating Ground Diode Mode Readings taken with all connectors Disconnected. Black lead on Floating Gnd. DVM in Diode Mode. August 2009 Plasma 50PS80...
Page 74 Reading will vary Reading will vary P111 P111 All readings Open with All readings Open with Reading will vary Reading will vary Bottom of PWB Bottom of PWB All readings Open with All readings Open with August 2009 Plasma 50PS80...
Page 75 : Open BL: 0.6V : Open 6) CLK-B BL: 0.84V BL: 0.84V 7) OC2-B-Odd BL: 0.87V BL: 0.87V Floating Ground Floating Ground 8) OC2-B-Even BL: 0.87V BL: 0.87V All readings Open with All readings Open with August 2009 Plasma 50PS80...
Page 76: Y Drive Buffer Output Check
Pins Pins per FPC 12 FPC connections 12 FPC connections 1080 Total Horizontal Side Side 1080 Total Horizontal electrodes establishing electrodes establishing 68 pins 68 pins vertical pixel count vertical pixel count 67 pins 67 pins August 2009 Plasma 50PS80...
Page 77: Z - Sus Pwb Section
VS from the Switched Mode Power Supply • VS from the Switched Mode Power Supply • 15V from the Control board but developed on the • 15V from the Control board but developed on the SUS board SUS board August 2009 Plasma 50PS80...
Page 78 IPMs P312 Z Drive TP To SMPS IPMs FL103 FS100 (5V) Z Bias TP 4A/125V R457 Top Side to P102 Chassis Gnd To Panel Z-Bias Pins P100 Adj VR201 To Control 17.8V P103 P301 To Z-Sub August 2009 Plasma 50PS80...
Page 79 4) Place DC Volt meter on VZB TP Z-Bias TP (Top of R457 to Chassis Gnd). Top of R457 to Chassis Gnd 5) Adjust VZB (Z Bias) VR201 to match your Z-Bias specific Panel’s voltage label. VR201 Lower Right Side Of PWB August 2009 Plasma 50PS80...
Page 80 If the timing is out of sync, the Control board is at fault. Note: While making adjustments to the Ramp Up and/or Rame Down portion of the Y-Drive signal, the Control board makes the same adjustments to the Z-SUS waveform. August 2009 Plasma 50PS80...
Page 81 4) Place the Scope on the Z-SUS waveform Test Point FL103. 5) Confirm there is an Output from the Z-SUS PWB (approximate 230V p/p) This test confirms that the Power Supply, Control Board and Z-SUS boards are all working OK. August 2009 Plasma 50PS80...
Page 82: Z - Sus P101 Connector Pin Id And Voltages
*65V Open Open 0.74V Open 0.74V Open * Note: This voltage will vary in accordance with Panel Label Diode Mode Readings taken with all connectors Disconnected unless specified. Black lead on Gnd. DVM in Diode Mode. August 2009 Plasma 50PS80...
Page 83 17.8V 1.9V 17.8V 1.9V CTRL-OE Open ER-UP Open ER-DN Open Z Bias Open Open SUS-UP 0.4V Open SUS-DN 0.7V Open Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. August 2009 Plasma 50PS80...
Page 84: Control Board (Logic) Section
SUS board. passes this voltage on to the Z SUS board. • Generates 3.3V and routes this voltage down to the two X Board • Generates 3.3V and routes this voltage down to the two X Board August 2009 Plasma 50PS80...
Page 85: Control Board Layout
P101 P104 To Left X To Right X Pins 1~4 Auto Gen Pins 1~4 3.3V Short 1~2 3.3V IC16 IC304 P102 3.3V To Center X Pins 1~4 FOR TCPs To each Pins 1~4 X Board 3.3V August 2009 Plasma 50PS80...
Page 86: Control Board (Emi Filter) Explained
They have 4 pins. The top and bottom are the B+ route, the FL4 or FL5 two side solder points are Chassis Gnd. (5V EMI filters) P200 FL4 (5V) FL5 (5V) August 2009 Plasma 50PS80...
Page 87: Control Board Regulator Checks
Control board. Confirm that LED D6 and LED D7 are illuminated or blinking, if they Control board. Confirm that LED D6 and LED D7 are illuminated or blinking, if they are, the board is most likely OK. are, the board is most likely OK. August 2009 Plasma 50PS80...
Page 88: Control Board Crystal X2 Check
Control Board Crystal X2 Check Control Board Crystal X2 Check Use bottom left leg of Crystal 50Mhz 4V P/P August 2009 Plasma 50PS80...
Page 89 TCP RGB per/Pixel 128 Lines per Buffer 5888 / 3 = 1962 256 Lines output Total 1920 actual (42 pin outputs not used) To X-Drive To X-Drive To X-Drive Center Board Right Board Left Board August 2009 Plasma 50PS80...
Page 90: Control Board Lvds P5 Connector
LVDS cable, press the two locking tabs inward, then rock the connector side to side while pulling out on the connector. Press Inward P6 Auto Gen: Jump pin 1 to 2, a series of patterns will be produced on screen. August 2009 Plasma 50PS80...
Page 91: Control Board Lvds P5 Connector Voltages And Diode Check
Open 1.2V 1.3V 1.2V Open 1.3V 3.3V Open 1.3V 3.3V Open 1.3V 3.3V Open 1.1V 1.3V 0.58V Open Blue Pins indicate 24 bit (12 bit differential) video signal Note: There are no voltages in Stand-By mode. August 2009 Plasma 50PS80...
Page 92: Control Board P2 Connector Pin Id And Voltages
Z Bias 1.48V ER-DN 1.48V ER-UP 1.48V P2 Label P2 Label CTRL-OE 1.4V 17.8V 1.32V 17.8V 1.32V 17.8V 1.32V 17.8V 1.32V Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. August 2009 Plasma 50PS80...
Page 93: Control Board P200 Connector Pin Id And Voltages
P200 CONNECTOR "Control PWB “ to “Power Supply PWB” P813 Diode Mode Diode Mode Label Connected Disconnected 0.75V 0.92V 0.75V 0.92V 0.75V 0.92V 0.75V 0.92V Diode Mode Readings taken with all connectors Disconnected, (Unless Specified). Black lead on Gnd. DVM in Diode Mode. August 2009 Plasma 50PS80...
Page 94 P101 Control P1 to Control P1 to Control PWB Y-SUS PWB Pin 1 on Control is Y-SUS Y-SUS 17.8V Pin 50 on Y-SUS 17.8V P101 Plug P101 Plug 17.8V 17.8V 17.8V Information Information 17.8V 2.84V OC2_ODD OC2_ODD 1.87V OC1_ODD OC1_ODD 0.3V Voltage Measurements for the Control PWB.
Page 95: Control P1 To Y - Sus P101 Plug Information
SET_DN1 3.48V 1.44V CTRL_OE 1.44V 0.3V 1.44V PASS_TOP 1.4V 1.44V DATA_ODD 1.44V DELTA_VY2 0.7V 1.44V DATA_EVEN 1.44V ER_UP 0.2V 1.44V 4.3V 1.44V ER_DN 0.1V 1.44V OC2_EVEN 2.8V 1.44V SUS_UP 0.1~0.4V 1.44V SUS_DN 1.44V OC1_EVEN 1.85V 1.44V August 2009 Plasma 50PS80...
Page 96 1.27V 0.97V 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V 1.27V 0.97V 1.27V 0.97V 1.87V 1.2V 1.0V 0.97V 1.87V 1.2V 1.27V 0.97V 3.22V 1.2V 1.0V 0.97V 0.49V 1.1V 1.27V 0.97V 0.49V 1.1V Pins with no TP are Gnd. August 2009 Plasma 50PS80...
Page 97 1.0V 0.97V 1.27V 0.97V Note: 1.27V 0.97V 1.27V 0.97V 1.0V 0.97V There are no voltages in 1.0V 0.97V 1.0V 0.97V 1.27V 0.97V Stand-By mode. 1.27V 0.97V 1.27V 0.97V 1.0V 0.97V Pins with no TP are Gnd. August 2009 Plasma 50PS80...
Page 98 1.27V 0.98V 1.87V 0.49V 1.0V 0.98V 1.87V 0.49V 3.3V TP 1.27V 0.98V 3.22V 3.22V Note: 1.0V 0.98V 0.49V 1.87V There are no voltages in Stand-By mode. 1.27V 0.98V 0.49V 1.87V Pins with no TP are Gnd. August 2009 Plasma 50PS80...
Page 99 • Control board develops 3.3V and routes to each X board via • Control board develops 3.3V and routes to each X board via ribbon connectors P110, P210 and P310. ribbon connectors P110, P210 and P310. August 2009 Plasma 50PS80...
Page 100 There are a total of 23 TCPs and each TCP has 2 buffers. So ther are a total of 46 buffers feeding the panel ’ s vertical 5760 electrodes. are a total of 46 buffers feeding the panel ’ s vertical 5760 electrodes. August 2009 Plasma 50PS80...
Page 101 The Vertical The Vertical Address buffers Address buffers (TCPs) have one (TCPs) have one heat sink across heat sink across all 23 TCPs as all 23 TCPs as indicated by the indicated by the arrow. arrow. August 2009 Plasma 50PS80...
Page 102 On any Va (0.54V) TCPs connected. On any Va (Open) On any Va (0.84V) TCPs disconnected. On 3.3V (0.62V) On 3.3V (0.42V) On any VPP (Open) On any VPP (0.42V) Readings given with TCPs connected unless specified. August 2009 Plasma 50PS80...
Page 103 X-Board. 1920 Horizontal (5888 / 3 vertical electrodes) 42 not used. X Drive Board Y-SUS Board Logic Control Board Chocolate 128 lines 128 lines Taped Carrier Package 256 total lines 256 Vertical Electrodes Heat Sink Attached directly Back side of TCP Ribbon to Flexible cable August 2009 Plasma 50PS80...
Page 104 Must be checked on flexible cable. On any Gnd Look for any TCPs 3.3V On the below: being discolored. Ribbon Damage. On any Va (0.58V) Cracks, folds On 3.3V (0.72V) Pinches, scratches, On any VPP (0.58V) etc… Reverse leads reads Open August 2009 Plasma 50PS80...
Page 105 3.3V test point. The upside down L trace at pins 34 and 35 of each connector. Example here from P204. You can only check for continuity, you can not run the set with heat sink removed. August 2009 Plasma 50PS80...
Page 106 Generate abnormal vertical bars c) Cause the entire area driven by the TCP to be “All White” d) Cause the entire area driven by the TCP to be “All Black” e) Cause a “Single Line” defect August 2009 Plasma 50PS80...
Page 107 Diode Mode *65V Open *65V Open *65V Open *65V Open * Note: This voltage will vary in accordance with Panel Label Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. August 2009 Plasma 50PS80...
Page 108 0.97V 1.27V 0.97V 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V 1.27V 0.97V 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V 1.27V 0.97V 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V 1.27V 0.97V 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V 57~60 3.3V 0.67V August 2009 Plasma 50PS80...
Page 109 0.97V 1.27V 0.97V 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V 1.27V 0.97V 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V 1.27V 0.97V 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V 1.27V 0.97V 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V 57~60 3.3V 0.67V August 2009 Plasma 50PS80...
Page 110 0.97V 1.27V 0.97V 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V 1.27V 0.97V 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V 1.27V 0.97V 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V 1.27V 0.97V 1.27V 0.97V 1.0V 0.97V 1.0V 0.97V 57~60 3.3V 0.67V August 2009 Plasma 50PS80...
Page 111 On any Va (0.84V) TCPs disconnected. TCPs connected or disconnected Note: Va voltage will vary by panel, check your specific panel ’ s voltage label. Note: Va voltage will vary by panel, check your specific panel ’ s voltage label. August 2009 Plasma 50PS80...
Page 112: Main Pwb Section
+5V from the Switched Mode Power Supply • +5V from the Switched Mode Power Supply • 12V for Tuner (Stepped down to 5V) • 12V for Tuner (Stepped down to 5V) • 17V for Audio • 17V for Audio August 2009 Plasma 50PS80...
Page 113 Main PWB Layout P203 Video To Control IC1005 P1108 IC1008 To SMPS Video P1111 P201 Reset IC100 IC1106 Video Processor Micro X1102 P1101 X300 To Ft Control IC900 Micro Reset Audio IC801 HDMI P900 To Speakers Tuner HDMI August 2009 Plasma 50PS80...
Page 114: Main Board
50PS80 MAIN PWB COMPONENT VOLTAGES 50PS80 MAIN PWB COMPONENT VOLTAGES Q1102 Q201 Q202 Q500 Q501 Q602 Q703 Q704 Q705 Q706 Q707 Q708 Q709 Q900 Q901 D801 D1010 A-6V 3.0V 2.2V 3.2V 3.3V 3.3V 2.4V 1.6V 0.6V 3.0V C-5V 3.3V 3.3V 3.3V...
Page 115: Main Pwb Crystal X1 And X501 Check
Main PWB Crystal X1 and X501 Check X1102 3.5V p/p 10Mhz X1102 Runs all the time X300 980mV p/p 54Mhz L300 X300 MAIN PWB Crystal Location X300 Runs only when set is on. Use bottom leg of L300 to measure August 2009 Plasma 50PS80...
Page 116 Main PWB Tuner Check (Shield Off) Pins Exposed TDVW H103F TU501 Video Pin Video Test Point SIF Pin Audio Test Point DIG IF (-) Pin DIG IF (+) Pin Digital Channel Test Point Data Pin MAIN PWB Clock Pin Tuner B+ (5V) Tuner Location August 2009 Plasma 50PS80...
Page 117 Tuner Location 500mV / 10uSec Pin 16 “SIF” Signal 450mVp/p Pin 1 700mVp/p 200mV / 2uSec Pin 12 and Pin 13 “Dig IF” Signal Note: “Dig IF” Signal only when 100mV / 1uSec receiving a Digital Channel. August 2009 Plasma 50PS80...
Page 118 August 2009 Plasma 50PS80...
Page 119: Main Pwb P203 Lvds Video Signal Check Location Identified
Main PWB P203 LVDS Video Signal Check Location Identified Main PWB P203 LVDS Video Signal Check Location Identified P203 Video TPs Video TP Location Numbers relate to P203 Pin Numbers. MAIN PWB August 2009 Plasma 50PS80...
Page 120 Main PWB P203 LVDS Video Signal Check Pins 21, 22, 27 and 28 Pins 21, 22, 27 and 28 SMTP Color Bar Signal Input Waveform TP see previous page. Pin 28 Pin 27 Pin 22 Pin 21 August 2009 Plasma 50PS80...
Page 121 Main PWB P203 LVDS Video Signal Check SMTP Color Bar Signal Input Pins 11, 12, 16 and 17 Pins 11, 12, 16 and 17 Waveform TP Under the LVDS Cable Pin 17 Pin 16 Pin 12 Pin 11 August 2009 Plasma 50PS80...
Page 122 Main PWB Main PWB Semiconductor Semiconductor Component Component Voltages Voltages August 2009 Plasma 50PS80...
Page 123 * Pin 24: When the Power Button is opened, • Pin 24 pulls up to 4.3V. • Stand-By turns off. AC-Det remains. Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. August 2009 Plasma 50PS80...
Page 124: Main Pwb Connector P1101 Voltage And Resistance
LED which also turns LED Cent 1.5V they get brighter, on then goes off then they go off. after turn on. Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. August 2009 Plasma 50PS80...
Page 125 Voltage and Diode Mode Measurements for the Main Board Speaker Plug P1005 CONNECTOR "Main" to "Speakers" Label Diode Mode 8.65V Open 8.65V Open 8.65V Open 8.65V Open Board Location P900 Speaker Connector MAIN PWB Diode Mode Check with the PWB Disconnected. DVM in the Diode mode. August 2009 Plasma 50PS80...
Page 126 3.3V generated on the Main PWB. • The Front Power LEDs are driven by 3 separate pins from the • The Front Power LEDs are driven by 3 separate pins from the Main board. Main board. August 2009 Plasma 50PS80...
Page 127 Front Control PWB Layout Front Control PWB Layout Lower Left Side (As viewed from rear). Lower Left Side (As viewed from rear). August 2009 Plasma 50PS80...
Page 128 Front IR PWB and the 1 Front IR PWB and the 1 screw at the bottom of the screw at the bottom of the Screw Power LED PWB. Power LED PWB. Right Tweeter Right Right Tweeter Tweeter Screw Screw Cabinet Bottom August 2009 Plasma 50PS80...
Page 129 Front Power LED and IR Board Layout Power LEDs Sensor Intelligent Sensor Right Tweeter Front IR PWB Center LED Power LED PWB From Power LED PWB P3 to Center LED PWB Location: Dead center under Panel August 2009 Plasma 50PS80...
Page 130: Front Power Led And Ir Board Connector Layout
Then they get brighter, then they go off. P3 connector receives the Center LED control signal from pin 15 of P1 and then delivers it to the Power LED Center LED PWB. PWB back August 2009 Plasma 50PS80...
Page 131: Front Ir And Intelligent Sensor Board Layout
Front IR and Intelligent Sensor Board Layout Front IR and Intelligent Sensor Board Layout Intelligent Sensor Infrared Sensor August 2009 Plasma 50PS80...
Page 132 LED which also turns LED Cent 1.5V they get brighter, on then goes off then they go off. after turn on. Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. August 2009 Plasma 50PS80...
Page 133 4.38V Open *STBY2 Main Power Button is “IN” For Voltages when each Key is pressed, see the Key PWB section. Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode. August 2009 Plasma 50PS80...
Page 134 Side Key Assembly Side Key Assembly To Ft IR PWB August 2009 Plasma 50PS80...
Page 135 P1 Connector “Side Key" to “IR/LED Control PWB“ J2 (No Key Pressed) STBY1 *STBY1 *STBY2 Diode Mode PWR SW KEY 1 3.3V 3.3V Open KEY 2 3.3V 3.3V Open STBY2 PWR SW 4.38V Open PWR SW Open August 2009 Plasma 50PS80...
Page 136: Interconnect Diagram
The 11 X 17 foldout is best viewed in the Adobe version in which The 11 X 17 foldout is best viewed in the Adobe version in which page can be zoomed in and out for easier reading. page can be zoomed in and out for easier reading. August 2009 Plasma 50PS80...
Page 137 50PS80 TV INTERCONNECT DIAGRAM P302 Y-SUS LOCATION Generic Part Diode Check Diode Check NOTE: Diode tests are conducted with the PWB disconnected. D51, 52, 61, 62, 71, 72 MA3DF30 Open Open Q51, 52, 61, 62, 71, 72, 73, 81, 82, 83...
Page 138 NOTE: LVDS P203 Information WAVEFORMS: 50PS80 LVDS P203 WAVEFORMS There are actually 20 pins carrying Video plus 4 pins carrying clock signals to the Waveforms taken using SMTP Color Bar input. All readings give their Time Base related to scope settings.
Page 139 End of Presentation End of Presentation This concludes the Presentation Thank You...