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D-EJ985
Pin No.
Pin Name
61 to 63
V3 to V1
64, 65
C1, C0
66
XWAKE
67
PGMSO
68
PGMSI
69
PGMSCK
70
AGCPWM
71
IR RMC
72
FG/FGSEL
73
PGMSEL
74
XDRVLT
75
XPOWLT
76
CHGGND ON
77
HG XCTB
78
HG GUP
79
XRST
80
LEDDISP
26
I/O
O
Liquid crystal display drive bias control signal output terminal Not used
Terminal for doubler circuit capacitor connection to develop liquid crystal display drive voltage
O
Not used
Wakeup control signal output to the power control (for system standby reset)
O
"L": wakeup The stop status is reset with the falling edge of input signal
O
Not used
I
Not used
O
Not used
O
AGC control pulse signal output to the power control
I
Not used
O
FG pulse signal input from the spindle motor driver
O
Not used
O
Serial data latch pulse signal output to the spindle motor driver
O
Serial data latch pulse signal output to the power control
O
Ground control signal output at the battery charge
O
Hologram control signal output to the optical pick-up "L": stop
O
CD-RW gain control signal output to the optical pick-up "H": gain up
Reset signal output to the headphone amplifier, spindle motor driver and CXD3039AR
O
"L": reset
O
CHARGE LED drive signal output "L": LED on
Description
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