Sony HCD-VX222 Service Manual page 46

Mini hi-fi component system
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HCD-VX222
VIDEO BOARD IC502 M30620MCA-B22FP (CD MECHANISM CONTROLLER)
Pin No.
Pin Name
I/O
1
SENSE
2
SENSE CLK
O
3
RESOLUTION
O
4
CHROMA LEVEL
O
5
DSP CLK
O
6
TSENS
O
7
REMOTE IN
8
BYTE
9
CN VSS
10
DSP MUTE
O
11
CTRL1
O
12
XRESET
13
XOUT
O
14
VSS
15
XIN
16
VCC
17
NMI
18
SCOR
19
DSENS
O
20
CL680 HINT
21
CL680 HSEL
O
22
DF LATCH
O
23
CL680 HRDY
24
CL680 RESET
O
25
H.SYNC IN
26
BGP
O
27
LPH
O
28
LD ON
O
29
12C.CLK
I/O
30
12C.DATA
I/O
31
DATA1O
O
32
DATA1I
33
CLK1
O
34
RTS1
O
35
XVLEVEL.DOWN
O
36
SUBQ DATA
37
SUBQ CLK
O
38
P.ON
O
39
BUS XRDY
40
BUS
O
41
BUS XHOLD
42, 43
BUS
O
44
OSD.LANGUAGE
45
VSYNC
46
BUS XWRL
O
47
LO.BOOST
O
48
AUDIO MUTE
O
49
LOAD OUT
O
50
LOAD IN
O
51
INSW
46
I
Internal status (SENSE) signal input from the CXD3008Q (IC101)
Sense serial data reading clock signal output to the CXD3008Q (IC101)
Y resolution output
Chroma level output
Serial data transfer clock signal output to the CXD3008Q (IC101)
Not used (open)
I
Remote control signal input terminal. Not used (open)
I
External data bus line byte selection signal input "L": 16 bit, "H": 8 bit (fixed at "L")
Ground terminal
Muting on/off control signal output to the CXD3008Q (IC101) "H": muting on
Clock selection signal output to the CXD3008Q (IC101) "L": 16.9344 MHz (double speed), "H": 33.8688 MHz
Reset signal input from the system controller (IC501) "L": reset
I
For several hundreds msec. after the power supply rises, "L" is input, then it changes to "H"
Main system clock output terminal (10 MHz)
Ground terminal
I
Main system clock input terminal (10 MHz)
I
Power supply terminal (+5V)
I
Non-maskable interrupt input terminal (fixed at "H" in this set)
I
Subcode sync (S0+S1) detection signal input from the CXD3008Q (IC101)
Not used (open)
I
Interrupt request signal input from the host MPU (IC505)
Video CD select data of the host MPU (IC505)
Serial data latch pulse output to the D/A converter (IC509) "L" active
I
Ready signal input for communication to the host MPU (IC505)
Reset signal output to the MPEG video/audio decoder (IC505) "L": reset
I
Horizontal sync signal input
Burst gate pulse signal output
AGC hold signal output
Laser power selection signal output to the CXA2568M (IC103) "H": laser on
I
2
C clock signal from CD mechanism control (IC501).
I
2
C data signal from CD mechanism control (IC501).
Serial data output to the MPEG video/audio decoder (IC506) and D/A converter (IC509)
I
Serial data input from the MPEG video/audio decoder (IC506)
Serial data transfer clock signal output to the MPEG video/audio decoder (IC506) and D/A converter (IC509)
RTS signal to serial port (check connector).
Not used (open)
I
Sub-code Q data input from the CXD3008Q (IC101)
Sub-code Q data reading clock signal output to the CXD3008Q (IC101)
Power on/off control signal output terminal. Not used (open)
I
Ready signal input terminal. Not used (fixed at "H")
Not used (open)
I
Hold signal input terminal. Not used (fixed at "H")
Not used (open)
I
OSD language select input terminal "H": English, "L": China
I
Vertical sync signal input
Bus write signal output.
Not used (open)
Audio muting on/off control signal output terminal "L": muting on. Not used (open)
Loading motor drive signal output terminal. Not used (open)
Loading motor drive signal output terminal. Not used (open)
I
Disc detection (load in) switch input terminal. Not used (fixed at "H")
Description

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