Block Diagram - Audio/Video Section - Aiwa CX-JV4 Service Manual

CX-JV4
6-2. BLOCK DIAGRAM – AUDIO/VIDEO Section –
DATA, BCK, LRCK
A
(Page 21)
CLK, GFS, FOK
B
(Page 21)
DATA
97 TDMDP
BCK
96 TDMCLK
LRCK
98 TDMFS
CLK
48 AUX3
GFS VIDEO CD MPEG PROCESSOR
45 AUX0
IC801
FOK
46 AUX1
DBUS0 – DBUS15
MA0 – MA8
64 65 92 3 2 99 4 – 12 13 – 28
ADDRESS BUS
DATA BUS
2 – 5, 7 – 10,
18 – 21, 24 – 28
35 – 38, 40 – 43
A0 – A8
DQ0 – DQ15
D-RAM
IC804
30 31 16 15 29
DATAI
AUX7 54
ACK
AUX2 47
STB
AUX6 52
MPEG VIDEO/AUDIO DECODER
AOUT/SELPLL0 89 21 TSD
88 17 MCLK
ACLK
ATCLK 90 22 TBCK
ATPS/SELPLL1 91 19 TWS
AIN 93 33 RSD/SPLL0
ARCLK 94 37 PBCK/SER IN
23 PWS/SPLL1
ARFS 95
HSYNC 41 82 HSYNC
40 84
VSYNC VSYNC
PCLK 44 79 PCK
PCLK2X 43 80 PCK2
66 6 DSC-C
LCS1
AUX5 53 10 DSC-S
AUX4 49 35 AUX11
CPUCLK 42 12 DCLK
24 RSTOUT
RESET 29
DSCD0 – DSCD7
LD0 – LD7
LA0 – LA17
8, 99, 97, 95,
55 – 62 68 – 87
93, 85, 83, 81
DATA BUS
12 – 5, 27, 26, 23, 25,
13 – 15, 17 – 21
4, 28, 29, 32, 30
DQ0 – DQ7
A0 – A17
PROGRAM ROM
IC803
22 24
22 22
IC802 (2/2)
AUX15 40
AOL+ 48
MIX AMP
IC701
AOL– 47
AOR+ 46
R-CH
AOR– 45 R-CH
VIDEO AMP
VDAC 64
Q901
S801
(SYSTEM SELECT)
PAL
AUX00 7
AUX01 9
AUTO
NTSC
RESET SIGNAL
13
RST GENERATOR +5V (VCD)
Q802
71 74
X801
27MHz
• R-ch is omitted due to same as L-ch.
• SIGNAL PATH
: CD PLAY (AUDIO)
: CD PLAY (VIDEO)
DATAI, DATAO, ACK, STB
D (Page 23)
CD
E (Page 24)
J901
VIDEO OUT