MSI H67MS-E33 series User Manual page 45

▶ tRP
Ths settng controls the number of cycles for Row Address Strobe (RAS) to be
allowed to precharge. If nsufficent tme s allowed for the RAS to accumulate ts
charge before DRAM refresh, refreshng may be ncomplete and DRAM may fal
to retan data. Ths tem apples only when synchronous DRAM s nstalled n the
system.
▶ tRAS
Ths settng determnes the tme RAS takes to read from and wrte to memory cell.
▶ tRFC
Ths settng determnes the tme RFC takes to read from and wrte to a memory
cell.
▶ tWR
Mnmum tme nterval between end of wrte data burst and the start of a precharge
command. Allows sense amplfiers to restore data to cells.
▶ tWTR
Mnmum tme nterval between the end of wrte data burst and the start of a col-
umn-read command. It allows I/O gatng to overdrve sense amplfiers before read
command starts.
▶ tRRD
Specfies the actve-to-actve delay of dfferent banks.
▶ tRTP
Tme nterval between a read and a precharge command.
▶ tFAW
Ths tem s used to set the tFAW (four actvate wndow delay) tmng.
▶ tWCL
Ths tem s used to set the tWCL (Wrte CAS Latency) tmng.
▶ tCKE
Ths tem s used to set the tCKE tmng.
▶ Advanced Channel 1/ 2 Tmng Configuraton
Press <Enter> to enter the sub-menu. And you can set the advanced memory tmng
for each channel.
▶ tRRDR/ tRRDD/ tWWDR/ tWWDD/ tRWDRDD/ tWRDRDD/ tRWSR
These tems s used to set the memory tmngs for memory channel 1/ 2.
MS-7680 MS-7680
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