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19.10.12 Mode Page 19h (Fibre Channel Port Control Page)
Table 157: Mode Page 19h
Byte
7
RSVD=
0
PS
1
2
3
DTFD
PLPB
4
5
6
7
•
DTFD (Disable Target Fabric Discovery) bit of one indicates that a Target attached by an FC-AL loop shall not rec-
ognize the presence of a fabric loop port, FL_Port, on the loop. The Target shall perform only the private loop func-
tions defined for Targets defined by FC-PLDA. When DTFD bit is zero, the Target attached by an FC-AL loop shall
discover FL_Port if present on the loop and perform the public loop functions defined for Targets by FC-FLA.
•
PLPB (Prevent Loop Port Bypass) bit of one specifies that the Target ignores all LPB (Loop Port Bypass) and LPE
(Loop Port Enable) primitive sequences. The Target's ports always remain in participating mode. A PLPB bit of zero
specifies that the Target allow LPB and LPE primitive sequences to control its port bypass circuitry.
•
DDIS (Disable Discovery) bit of one specifies the Target does not require receipt of Address or Port Discovery in
order to resume tasks following loop initialization. When DDIS is zero, the Target will only resume tasks for an Initi-
ator on receipt of an Address or Port Discovery from that Initiator.
•
DLM (Disable Loop Master) bit of one specifies the Target does not become loop master during loop initialization.
When DLM is zero, the Target may become loop master.
•
RHA (Require Hard Address) bit of one indicates that a Target attached to an FC-AL loop shall only attempt to
obtain its hard address available in the SCA-2 SFF-8067 connector or device address jumpers during loop initializa-
tion. The Target shall not attempt to obtain an address during the LISA phase of initialization. If there is a conflict for
the hard address selection during loop initialization or the Target does not have a valid hard address available, the
Target shall enter the non-participating state. If the Target detects loop initialization while in the non-participating
state, the Target shall again attempt to get its hard address. If the hard address has not changed from the address
obtained in a previous successful loop initialization, the Target shall attempt to obtain the address in the LIFA phase
if a valid Fabric login exists or LIPA phase of loop initialization. If the hard address has changed, the Target shall
attempt to obtain the new address in the LIHA phase. When the RHA bit is zero, the Target follows the normal initial-
ization procedure, including the possibility of obtaining a soft address during the loop initialization process.
•
ALWLI (Allow Login Without Loop Initialization) bit of one specifies the Target uses its hard address to accept log-
ins without verifying the address with loop initialization. When ALWLI is zero, the Target is required to obtain an
address via the loop initialization procedure before accepting a login.
•
DTIPE (Disable Target Initiated Port Enable) bit of one specifies the Target waits for a Loop Port Enable primitive
with its own hard address before inserting itself onto the loop. When DTIPE is zero, the Target inserts itself onto the
loop without waiting for a Loop Port Enable primitive.
BIT
6
5
4
0
Page Length = 06h
Reserved = 0
DDIS
DLM
Reserved = 0
Reserved = 0
Resource Recovery Time Out Value (RR_TOV)
Hitachi Ultrastar 15K450 (FC-AL) Hard Disk Drive Specification
3
2
1
Page Code = 19h
RHA
ALWLI DTIPE
RR_TOV Units
190
Default
0
99h
06h
00h
DTOLI
00h
00h
00h
00h
00h
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