Sony D-NE509 Service Manual page 11

• IC701 CXR710160-203R (SOUND PROCESSOR)
Pin No. Pin Name
1 LRCH
2 BCK
3 VDIOCD0
4 PCMD
5 DVDD4
6 TAPTDO
7 SCANEN
8 DVDD0
9 DVSS0
10 VDIO0
11 VDIOCD1
12 PF4
13 PI3
14 PI2
15 PI0
16 EVA
17 KCLK
18 KSC
19 VDIO1
20 KDI
21 KDO
22 KRB
23 DVDD1
24 DVSS3
25 AVDPLL
26 AVSPLL
27 AVSOSC
28 AVDMO
29 EXTAL
30 XTAL
31 XIN
32 OSSEL
33 NRST
34 PF0
35 PF1
36 PF2
37 PF3
38 PC0
39 VDIOCD2
40 PC1
41 PC2
42 PC3
43 DVDD2
44 DVSS2
45 PE0
46 PE1
47 PE2
48 PE3
49 VDIO2
50 TACK (TEST6)
51 XOUT (TEST5)
52 TRST (TEST4)
I/O
I D/A I/F L/R clock input from CXD3048
I D/A I/F bit clock input from CXD3048
— Power supply (+2.0 V)
I D/A I/F serial data input from CXD3048
— Power supply (+1.5 V)
O Debug signal output
I Not used (fixed at "L")
— Power supply (+1.5 V)
— Ground
— Power supply (+2.0 V)
— Power supply (+2.0 V)
I XRDE monitor signal input from CXD3048
O D/A I/F bit clock output to CXD3048
O D/A I/F L/R clock output to CXD3048
O D/A I/F serial clock output to CXD3048
I Mode select input terminal
O Not used (open)
O Not used (open)
— Power supply (+2.0 V)
O Not used (open)
I Not used (fixed at "L")
I Not used (fixed at "L")
— Power supply (+1.5 V)
— Ground
— Power supply (PLL) (+2.6 V)
— Ground (PLL)
— Ground
— Power supply (+2.6 V)
I System clock input (22 MHz)
O System clock output (22 MHz)
I System clock input (22 MHz)
I Input terminal for clock frequency setting (fixed at "L")
I Reset signal input
I Interrupt signal input to TMP91CW28FG
I Not used (fixed at "L")
O Pull up to 2.0 V
O REQ signal output to TMP91CW28FG
I Clock signal input from TMP91CW28FG
— Power supply (+2.0 V)
O Serial data output to TMP91CW28FG
I Serial data input from TMP91CW28FG
I Data latch signal input from TMP91CW28FG
— Power supply (+1.5 V)
— Ground
— Not used (open)
— Not used (open)
— Not used (fixed at "L")
— Not used (open)
— Power supply (+2.0 V)
O Not used (open)
O Not used (open)
I Not used (fixed at "L")
Pin Description
D-NE509
11