SOYO SY-P4VGA User Manual page 54

BIOS Setup Utility
3-3.3 CPU & PCI Bus Control
Caution: Change these settings only if you are already familiar
with the Chipset.
The [CPU & PCI Bus Control] option changes the values of the chipset
registers. These registers control the system options in the computer.
CPU to PCI Write Buffer
PCI Master 0 WS Write
PCI Delay Transaction
Enter:Select
:Move
F5:Previous Values
After you have completed the changes, press [Esc] and follow the
instructions on your screen to save your settings or exit without saving.
CPU & PCI Bus Control
Setting
CPU to PCI Disabled
Write Buffer
Enabled
PCI Master 0 Disabled
WS Write
Enabled
PCI Delay Disabled
Transaction Enabled
Phoenix – Award BIOS CMOS Setup Utility
CPU & PCI Bus Control
Enabled
Enabled
Disabled
+/-/PU/PD:Value
F6:Fail-Safe Defaults
Description
Enabled the CPU to PCI Write
Buffer.
This item allows you to
enabled/disabled the PCI post write. Default
The chipset has an embedded 32-bit
posted write buffer to support delay
transactions cycles. Select Enabled
to support compliance with PCI
specification version 2.1.
Menu Level
F10:Save ESC:Exit
50
SY-P4VGA
Item Help
F1:General Help
F7: Optimized Defaults
Note
Default
Default