Cpu Configuration - Foxconn Cinema II Deluxe User Manual

CPU Configuration

Allow Microcode Updates
Secure Virtual Machine
Cool 'N' Quiet
► Advanced CPU Settings
CPU Configuration
Module Version: 13.55
AGESA Version : 3.5.2.0
Physical Count : 1
Logical Count : 4
AMD Athlon(tm) II X4 805 Processor
Revision : C2
L1 Cache: 512KB
L2 Cache: 2048KB
L3 Cache: 4MB
HT Speed : 2000MHz,
↑↓←→:Move Enter:Select
This menu shows most of the CPU specifications.
► Allow Microcode Updates
It allows the CPUs Microcode to be updated/patched.
► Secure Virtual Machine
This option is used to enable or disable Secure Virtual Machine Mode (SVM) Support.
► Cool 'N' Quiet (Appear only when CPU supports)
This option helps lowering down the CPU frequency and voltage when system is idling. When
the CPU speed is slowing down, the temperature will drop as well.
► Advanced CPU Settings
Press <Enter> to go to its submenu.
► CPU-NB HT Link Control
HT stands for HyperTransport bus. The CPU<->NB HT Link Control option controls the physi-
cal speed of the CPU to Northbridge HT link using multipliers ranging 1x to 13x. The physical
speed of the link is determined by multiplying the CPU FSB with the CPU<->NB HT Speed
setting.
► CPU-NB HT Multiplier
HT stands for HyperTransport bus. The CPU<->NB HT Multiplier option controls the physical
speed of the CPU to Northbridge HT link using multipliers ranging 1x to 13x. The physical
speed of the link is determined by multiplying the CPU FSB with the CPU<->NB HT Speed
setting.
► HT Uplink Width / HT DownLink Width
The coherency refers to the caching of memory, and the HT links between processors are co-
herent HT links as the HT protocol includes messages for managing the cache protocol. Other
(non processor-processor) HT links are Non-Coherent HT links, as they do not have memory
cache.
The HyperTransport link width and frequency are initialized between the adjacent coherent
and/or noncoherent HyperTransport technology devices during the reset sequence.
It is highly recommended to set to [Auto] for overall performance.
CMOS Setup Utility - Copyright (C) 1985-2009, American Megatrends, Inc.
Overclock Control Center
Up/Down Width: 16/16bit
+/-/:Value
F2/F3:Change Colors
Help Item
[Enabled]
[Enabled]
[Enabled] Allow the CPUs
[Press Enter] Microcode to be
updated/patched
F10:Save ESC:Exit
F9:Optimized Defaults
38
F1:General Help