LG RH-2320 Service Manual page 114

• Block Diagram (SODC : MN103SC7G)
FEP
DRC
LDD
ANALOG
FEP
SERVO
debugger
Watchdog
LGE Internal Use Only
Formatter
CIRC
DMA bus
ODC
CD
(ECC command)
Write
Internal
data memory
On-Chip
Debugger
Resistor bus
Interrupt
Timer
Timer ion
DVD/CD
DVD
error
correction
eDRAM
System
I/F
Bus
32 bit
control
CPU
General-
Purpose
PWM
Ports
4-44 Copyright © 2008 LG Electronics. Inc. All right reserved.
ATAPI
I/F
eDRAM
I/F
16 Mbit
Clock
Generator
Flash
ROM
2 Mbytes
Serial
I/F
Only for training and service purposes
HOST
16.9 MHz