Page 1 VXIplug&play function reference......VXIplug&play Online Help Soft Front Panel information ......VXIplug&play Online Help VISA language information........Agilent VISA User's Guide Agilent VEE programming information.....Agilent VEE User's Manual *Supplied with Agilent Command Modules, Embedded Controllers, and VXLink. *E1330-90007* Manual Part Number: E1330-90007 Printed in Malaysia E0606...
Page 3: Table Of Contents
SCPI Command Format Used in This Manual ............ 14 Specifying SCPI Commands ................14 Initial Operation ......................16 Chapter 2 Configuring the Agilent E1330B Digital I/O Module ..........17 Using This Chapter ..................... 17 Setting the Address Switch ..................18 Enabling Pull-ups......................19 Selecting the Interrupt Line ..................
Page 4 Chapter 4 Understanding the Agilent E1330B Digital I/O Module .......... 41 Using This Chapter ..................... 41 Port Description ......................41 Data Lines ......................41 The FLG Line (Input) ..................42 The CTL Line (Output) ..................42 The I/O Line (Output) ..................42 The STS Line ......................
Page 5 Chapter 5 Agilent E1330B Digital I/O Module Command Reference (continued) MEMory Subsystem (continued) :VME:SIZE? ......................70 :VME:STATe ...................... 71 :VME:STATe? ....................71 [SOURce:] Subsystem ....................72 DIGital:CONTroln:POLarity ................74 DIGital:CONTroln:POLarity? ................74 DIGital:CONTroln[:VALue] ................75 DIGital:CONTroln[:VALue]? ................75 DIGital:DATAn[:type]:BITm ................76 DIGital:DATAn[:type]:BITm? ................
Page 6 Command Quick Reference..................99 Appendix A Agilent E1330B Digital I/O Specifications ............... 103 Appendix B Agilent E1330B Digital I/O Module Register Information ........105 Using This Appendix ....................105 Addressing the Registers ..................105 The Base Address ....................106 Register Offset ....................108 Reset and Registers ....................
Page 7: Warranty
QUALITY, AND FITNESS FOR A PARTICULAR PURPOSE. 8. Agilent will be liable for damage to tangible property per incident up to the greater of $300,000 or the actual amount paid for the product that is the subject of the claim, and for damages for bodily injury or death, to the extent that all such damages are determined by a court of competent jurisdiction to have been directly caused by a defective Agilent product.
Page 8: Safety Symbols
Agilent Technologies, Inc. assumes no liability for the customer's failure to comply with these requirements. Ground the equipment: For Safety Class 1 equipment (equipment having a protective earth terminal), an uninterruptible safety earth ground must be provided from the mains power source to the product input wiring terminals or supplied power cable.
Page 9: Declaration Of Conformity
UL 3111-1: 1994 1 June 2001 Date Ray Corson Product Regulations Program Manager For further information, please contact your local Agilent Technologies sales office, agent or distributor. Authorized EU-representative: Agilent Technologies Deutschland GmbH, Herrenberger Stra e 130, D 71034 Böblingen, Germany...
Page 10: User Notes
Notes:...
Page 11 Notes:...
Page 12 Notes:...
Page 13: Getting Started
Initial Operation ........Page 16 Technical Description The E1330B Quad 8-Bit Digital I/O Module (referred to as the Digital I/O module) is a four port digital input/output module intended for data communication and digital control in electronic environments.
Page 14 "LWORd" format (using 4 ports). Table 1-1 shows the mapping of bit numbers from the 8-bit ports to the 16- or 32-bit ports. Chapter 5 — “Agilent E1330B Digital I/O Command Reference” describes each command in detail and Chapter 3 — “Using the Agilent E1330B Digital I/O Module”...
Page 15: Instrument Definition
Instrument Definition Each Digital I/O module installed in an Agilent mainframe is treated as an independent instrument; having a unique secondary GPIB address. Each instrument is also assigned a dedicated error queue, input and output buffers, status registers and, if applicable, dedicated mainframe memory space for readings or data.
Page 16: Scpi Command Format Used In This Manual
, or . The allowable values of the parameters are given in Chapter 5 — “Agilent E1330B Digital I/O Module Command Reference”. You must include at least one space between the keywords and the parameter.
Page 17 Specifying a Bit Each of the four ports on the module has eight bi-directional data lines, corresponding to eight programmable data bits. Some SCPI commands allow you manipulate or read these bits individually. For example: MEASure:DIGital:DATA :BIT This command reads the state of a bit, specified by m, on port n. The result will be either 0 or 1, indicating the current logical state of the bit.
Page 18: Initial Operation
0 FLG line. The example uses an HP Series 200/300 Computer with BASIC as the programming language. The computer is connected to an Agilent E1301 Mainframe using the General Purpose Interface Bus (GPIB)*. The GPIB interface select code is 7, the GPIB primary address is 09, and the GPIB secondary address (used to specify the Digital I/O module) is 18.
Page 19: Configuring The Agilent E1330B Digital I/O Module
Typical Connection ....... . Page 29 Figure 2-1. Agilent E1330B Digital I/O Module...
Page 20: Setting The Address Switch
Note To be recognized as an instrument when you are using the Digital I/O module in an Agilent E1300/1301 Mainframe or with an Agilent E1405 or E1406 Command Module, the logical address must be set to a multiple of 8.
Page 21: Enabling Pull-Ups
With power applied, the resistive terminating network is equivalent to that shown in Figure 2-3. Figure 2-3. Equivalent Data Line Termination Chapter 2 Configuring the Agilent E1330B Digital I/O Module...
Page 22: Selecting The Interrupt Line
Figure 2-4. Priority Interrupt Connector (Factory Setting) Note The interrupt circuitry for the Agilent E1330B is implemented as release on interrupt acknowledge (ROAK). The Agilent E1330B Digital I/O module will de-assert (or release) the interrupt request line during an interrupt acknowledge cycle.
Page 23: Combining The Flag Lines
Chapter 4 of this manual. Note When using FLG and CTL for handshaking on multiple port operations, CTL is set for each port sequentially, beginning at the lowest numbered port. Figure 2-5. Flag Combine Switches Chapter 2 Configuring the Agilent E1330B Digital I/O Module...
Page 24: Digital I/O Module Peripheral Pinout
Figure 2-8 shows how to connect the cables. Details about the functioning of these pins is covered in Chapter 4 — “Understanding the Agilent E1330B Digital I/O Module but line names are as follows: Reset Line - used to reset a peripheral. Output from the Digital I/O module.
Page 25 Figure 2-6. J1 and J2 Connector Pinouts Chapter 2 Configuring the Agilent E1330B Digital I/O Module...
Page 26 Figure 2-7. Data Line Location on Ribbon Cables Figure 2-8. Connecting the Digital I/O Cable 24 Configuring the Agilent E1330B Digital I/O Chapter 2...
Page 27: Configuring For Isolated Digital I/O
 3. Connect the ribbon cable to the Opto 22 rack for optically isolated digital operation.  Opto 22 is a registered trademark of Opto 22, Huntington Beach, CA 92649 Chapter 2 Configuring the Agilent E1330B Digital I/O Module...
Page 28: Connecting To A Gpio Peripheral
1. Connect the ribbon cable to connector J1 and/or J2 on the Digital I/O module. 2. Connect the wires on the ribbon cable to the peripheral as described in Table 2-1 for the GPIO interface. Figure 2-9. Typical Isolated Peripheral Hookup 26 Configuring the Agilent E1330B Digital I/O Chapter 2...
Page 29 CTL2 CTL3 I/O2 I/O3 For the Digital I/O connectors, all even numbered pins are ground. For the GPIO connector, pins 5, 6, 10, 14, 23, 24, 28 and 32 are ground. Chapter 2 Configuring the Agilent E1330B Digital I/O Module...
Page 30: Using With External Pull-Ups
Imax 0.025 The value of TTL high with the 200 Ω pull-up resistor is calculated as follows: 6200 × -------------------------- - 4.84Vdc High 6200 Figure 2-10. Typical Open Collector Data Line 28 Configuring the Agilent E1330B Digital I/O Chapter 2...
Page 31: Typical Connection
3.2 mA to pull the line to less than 0.4 V. The I/O, CTL, and RES lines are open collector, and require external pull-up to logic high. Figure 2-11. Typical Driver/Receiver Connections Chapter 2 Configuring the Agilent E1330B Digital I/O Module...
Page 32 Notes: 30 Configuring the Agilent E1330B Digital I/O Chapter 2...
Page 33: Using The Agilent E1330B Digital I/O Module
Additionally, no two instruments in the same system can have the same logical address. Setting the logical address is described in Chapter 2 — “Configuring the Agilent E1330B Digital I/O Module”. Chapter 3 Using the Agilent E1330B Digital I/O Module...
Page 34: Operation Overview
Operation Overview The following steps illustrate general operation of the Digital I/O module. Figure 3-1. Agilent E1330B General Operation 32 Using the Agilent E1330B Digital I/O Module Chapter 3...
Page 35: Default And Reset States
1, or a bit set to 1 will output a TTL High level. *RST (reset) condition is positive polarity for control (CTL), flag (FLG), and data lines on all ports. Chapter 3 Using the Agilent E1330B Digital I/O Module...
Page 36: Setting The Handshake Mode
0.015 seconds. Detailed descriptions of the handshake modes, timing diagrams, and the use of the FLG and CTL lines are given in Chapter 4 —“Understanding the Agilent E1330B Digital I/O Module”. 34 Using the Agilent E1330B Digital I/O Module Chapter 3...
Page 37: Inputting Data Bytes And Bits
*RST inputs, with the ports terminating resistors pulling them high. Bits will be read as a 1 and a byte as 255. Chapter 3 Using the Agilent E1330B Digital I/O Module...
Page 38: Outputting Data Bytes And Bits
1 to TTL high. Port 0, bit 5 and port 1 data lines will remain in the TTL high condition until another output command or input command at the same port is received. 36 Using the Agilent E1330B Digital I/O Module Chapter 3...
Page 39: Multiple Port Operations
The handshake mode is set to LEADing. The output data is given in hexadecimal as specified by the characters. When using multiple port handshaking, use the highest numbered port CTL line to ensure a correct handshake. Chapter 3 Using the Agilent E1330B Digital I/O Module...
Page 40: Using Trace Memory
!Fill memory alpha with 20 bytes. 110 OUTPUT@Dio;"SOUR:DIG:DATA0:WORD:TRAC alpha;*OPC?" !Output the 20 bytes. 120 ENTER @Dio;Ready !Wait for completion. 130 OUTPUT @Dio;"SOUR:DIG:TRAC:DEL alpha;*OPC?" !Delete memory alpha. 140 ENTER @Dio;Ready !Wait for completion. 150 END 38 Using the Agilent E1330B Digital I/O Module Chapter 3...
Page 41 100 ENTER @Dio;Ready !Wait for completion. 110 OUTPUT @Dio;"SOUR:DIG:TRAC:DATA? alpha" !Request the data. 120 ENTER @Dio USING "4A,40(W)";Head$;A(*) 130 OUTPUT @Dio;"SOUR:DIG:TRAC:DEL alpha;*OPC?" !Remove memory block. 140 ENTER@Dio;Ready !Wait for completion. 150 END Chapter 3 Using the Agilent E1330B Digital I/O Module...
Page 42 Notes: 40 Using the Agilent E1330B Digital I/O Module Chapter 3...
Page 43: Understanding The Agilent E1330B Digital I/O Module
1 = TTL High POSitive Polarity TTL Low = 0 0 = TTL Low TTL High = 0 0 = TTL High NEGative Polarity TTL Low = 1 1 = TTL Low Chapter 4 Understanding the Agilent E1330B Digital I/O Module...
Page 44: The Flg Line (Input)
Caution To prevent damage to the Digital I/O module, when the I/O line is set for Output (TTL Low), the peripheral MUST NOT attempt to source on any data lines. 42 Understanding the Agilent E1330B Digital I/O Module Chapter 4...
Page 45: The Sts Line
1, or a bit set to 1 will output a TTL High level. *RST (reset) condition is positive polarity for control (CTL), flag (FLG), and data lines on all ports. Chapter 4 Understanding the Agilent E1330B Digital I/O Module...
Page 46: Using The Handshake Modes
[:type]:HANDshake[:MODE] < > mode [SOURce:]DIGital:HANDshake [:MODE] < > These SCPI commands set the timing of the handshake (where timing applies): [SOURce:]DIGital:DATA [:type]:HANDshake:DELay < time > time [SOURce:]DIGital:HANDshake :DELay < > 44 Understanding the Agilent E1330B Digital I/O Module Chapter 4...
Page 47: Handshake Modes
CTL to FALSE. FLG line to READY (indicating it has latched the data) the next handshake can begin. The peripheral senses the CTL line and returns the FLG line to READY. Chapter 4 Understanding the Agilent E1330B Digital I/O Module...
Page 48 FLG line FLG line in the READY state and to READY. returns CTL to FALSE. The Digital I/O module senses the FLG READY and latches the data. 46 Understanding the Agilent E1330B Digital I/O Module Chapter 4...
Page 49 FLG line to FALSE, and latches the input BUSY and latches the data. data. When the data is entered, the peripheral returns the FLG line to READY. Chapter 4 Understanding the Agilent E1330B Digital I/O Module...
Page 50 FLG line change to BUSY the change of the FLG line and and latches the data. sets CTL to FALSE. The Digital I/O module then sets the CTL line FALSE. 48 Understanding the Agilent E1330B Digital I/O Module Chapter 4...
Page 51 Handshake timing is set through the SCPI commands time [SOURce:]DIGital:DATA [:type]:HANDshake:DELay < > time . Handshake timing is [SOURce:]DIGital:HANDshake DELay < > generally used for data output operations. Timing for data input affects only STRobe handshake modes. Chapter 4 Understanding the Agilent E1330B Digital I/O Module...
Page 52: Inputting Data Bytes And Bits
0 and 255, indicating the condition of the data lines on port n, following completion of the input handshake. The value returned depends upon the programmed state of the port POLarity. In the default state 50 Understanding the Agilent E1330B Digital I/O Module Chapter 4...
Page 53: Outputting Data Bytes And Bits
Bit numbers range from 0 to 7 for single port operations. For multiple port operations, bit numbers can range from 0 to 31. The section “Multiple Port Operations” beginning on page 53 describes bit numbering for multiple port Chapter 4 Understanding the Agilent E1330B Digital I/O Module...
Page 54: Byte Output
7. The table below shows the bit numbers and data lines. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 52 Understanding the Agilent E1330B Digital I/O Module Chapter 4...
Page 55: Multiple Port Operations
, are all described earlier in this chapter. See the < > sections “Handshake Modes”, “Handshake Timing”, and the introduction to “Multiple Port Operations” for explanations of these keywords and parameters. Chapter 4 Understanding the Agilent E1330B Digital I/O Module...
Page 56: Multiple Port Input/Output
Table 4-1 shows allowable port combinations for each value of [:type] You can combine multiple port operations on the same Digital I/O module. For example, you could define two independent 16-bit ports at port 0 and port 2. 54 Understanding the Agilent E1330B Digital I/O Module Chapter 4...
Page 57 D1_7–D1_0 D2_7–D_0 D3_7–D3_0 value value Parameters < > < > 32-bit (LWORd) operations Port # Bit Designations 31–24 23–16 15–8 7–0 Data Lines D0_7–D0_0 D1_7–D1_0 D2_7–D_0 D3_7–D3_0 value Parameters < > Chapter 4 Understanding the Agilent E1330B Digital I/O Module...
Page 58 Notes: 56 Understanding the Agilent E1330B Digital I/O Module Chapter 4...
Page 59: Agilent E1330B Digital I/O Module Command Reference
[SOURce:] DIGital :DATA third level command (where n is the port number 0–3), and [ :VALue] :BIT m are fourth level commands (where m is the queried bit location). Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 60 To set the instrument to output a logical 1 to bit 0 of port 3, you may send either: SOURce:DIGital:DATA3:BIT0 1 DIGital:DATA3:BIT0 1 Note You must include a space between the keywords and any parameters. 58 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 61: Linking Commands
Use a semicolon between the commands. For example: Commands *RST;DIG:CONT2 1 DIG:CONT2:POL POS;*OPC? Linking Multiple SCPI Commands. Use both a semicolon and a colon between the commands. For example: DIG:DATA2:POL NEG;:DIG:DATA2:BIT3 1 Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 62: Scpi Command Reference
SCPI Command Reference This section describes the Standard Commands for Programmable Instruments (SCPI) commands for the Digital I/O Module. Commands are listed alphabetically by subsystem and within each subsystem. 60 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 63: Display Subsystem
Monitor mode. Monitor mode enables the DISPlay Agilent E1301 Mainframe display, or an external terminal connected to either a B-size or a C-size mainframe. Parameters related to the state of the data and control lines are shown. Refer to the appropriate Command Module User's Guide (Agilent E1405/E1406) for supported terminal types.
Page 64: Monitor:port
It returns the last programmed state of the data lines. • Related Commands: DISPlay:MONitor:PORT DISPlay:MONitor:PORT? • *RST Condition: DISPlay:MONitor[:STATe] OFF|0 Example displays the state of the last port programmed. DISP:MON ON 62 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 65: Monitor[:State]
:MONitor[:STATe]? returns a number indicating whether the monitor mode DISPlay:MONitor[:STATe]? is enabled or disabled: = ON, = OFF. Parameters None. Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 66: Measure Subsystem
• n is the keyword used for commands relating to the data at port n. The :DATA port number n must be the last character of the keyword without spaces. 64 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 67: Digital:datan[:Type]:Trace
MEASure:DIGital:DATA [:VALue]? [SOURce:]DIGital:TRACe:DEFine • *RST Condition: Set to input on all ports. Example MEAS:DIG:DATA0:WORD:TRACe first_block reads 16-bit data from port 0 and stores it in the predefined user memory location first_block. Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 68: Digital:datan[:Type][:Value]
:LWORd when using the downloaded version of the SCPI driver. • Chapter 4 - “Understanding the Agilent E1330B Digital I/O Module” describes the byte order of multiple byte reads. • :DATA n is the keyword used for commands relating to the data at port n.
Page 69: Digital:flagn
Refer to Chapter 2 for additional information. • Related Commands: [SOURce:]DIGital:CONTrol :POLarity? [SOURce:]DIGital:CONTrol [:VALue] [SOURce:]DIGital:FLAG :POLarity [SOURce:]DIGital:FLAG :POLarity? Example reads the port 1 flag line. MEAS:DIG:FLAG1? Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 70: Memory Subsystem
The maximum length for name is 12 characters. • This command purges a single, specific macro; the common command *PMC purges all macros. Example deletes macro named test_macro previously defined MEM:DEL:MACR test_macro using the *DMC common command. 68 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 71: Vme:address
This command always returns the address in decimal format. • 2,097,152 The address returned using is always • The address returned using is always 14,680,056 • Related Commands: MEMory:VME:ADDRess MEMory:VME:SIZE? MEMory:VME:STATe? Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 72: Vme:size
This command always returns the memory size in decimal format. • The size returned using is always • The size returned using is always 12582912 • Related Commands: MEMory:VME:ADDRess? MEMory:VME:SIZE MEMory:VME:STATe? 70 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 73: Vme:state
VME memory. MEM:VME:STAT ON :VME:STATe? queries the state of the external memory. MEMory:VME:STATe? Parameters None. Comments This command returns , indicating external memory is OFF or ON. Related Commands: MEMory:VME:ADDRess? MEMory:VME:SIZE? Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 74: [Source:] Subsystem
<0| 1> :BIT :HANDshake :DELay < time > :DELay? [:MODE] <NONE |LEADing |TRAiling |PULSe| PARTial|STRobe> [:MODE]? :POLarity <POS| NEG> :POLarity? name :TRACe < > [:VALue] [< base >]< value > [:VALue]? 72 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 75 [:MODE]? :TRACe :CATalog? [:DATA] < name >,< block_data > name [:DATA]? < > name size fill :DEFine < >,< >,[< >] :DEFine? < name > :DELete :ALL name [:NAME] < > Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 76: Digital:controln:polarity
The port number n must be the last character of the keyword without spaces. • If n is omitted, port 0 is used. Example queries the state of the logical true condition on port 0. DIG:CONT0:POL? 74 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 77: Digital:controln[:Value]
The condition of the CTL line returned by this command is the logical true value set by the command. DIGital:CONTrol :POLarity Example returns the current state of the 8-bit port 2 control line. DIG:CONT2? Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 78: Digital:datan[:Type]:Bitm
Related Commands: [SOURce:]DIGital:DATA :POLarity [SOURce:]DIGital:DATA [:VALue] • *RST Condition: All ports are set for data input. Example sets bit 4 (the 5th bit) of port 3 to logical 1. DIG:DATA3:BIT4 1 76 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 79: Digital:datan[:Type]:Bitm
For 32-bit operations using , n must be 0. :LWORd • Related Commands: [SOURce:]DIGital:DATA :POLarity [SOURce:]DIGital:DATA [:VALue] Example DIG:DATA3:BIT4:VAL? returns a indicating the last programmed state of bit 4 on port 3. Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 80: Digital:datan[:Type]:Handshake:delay
*RST Condition: Delay is set to 2 Example DIG:HAND3:DEL .005 sets the delay between the data output and the assertion of the control line to true on 8-bit port 3 to 5ms. 78 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 81: Digital:datan[:Type]:Handshake:delay
DIG:DATA [:type]:HANDshake to data handshaking at ports defined by n. The port number n must be the last character of the keyword without spaces. • returns 0.000002 returns 0.015 Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 82: Digital:datan[:Type]:Handshake[:Mode]
[SOURce:]DIGital:CONTrol :POLarity [SOURce:]DIGital:CONTrol [:VALue] [SOURce:]DIGital:FLAG :POLarity [SOURce:]DIGital:HANDshake :DELay • *RST Condition: Mode is on all ports. NONE Example sets the handshake mode to LEADing on 8-bit port 3. DIG:DATA3:HAND LEAD 80 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 83: Digital:datan[:Type]:Handshake[:Mode]
• Related Commands: [SOURce:]DIGital:CONTrol :POLarity [SOURce:]DIGital:CONTrol [:VALue] [SOURce:]DIGital:FLAG :POLarity [SOURce:]DIGital:HANDshake :DELay • *RST Condition: Mode is NONE on all ports. Example DIG:DATA3:HAND? returns the handshake mode set on port 3. Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 84: Digital:datan[:Type]:Polarity
0, 1, 2, or 3 DATA WORD none, 0 or 2 LWORd none or 0 Example DIG:DATA0:POL? returns the state of the logical true condition on port 0 as either 82 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 85: Digital:datan[:Type]:Trace
Related Commands: [SOURce:]DIGital:DATA :POLarity [SOURce:]DIGital:DATA [:VALue] • *RST Condition: All ports are set for data input. Example writes data from the user memory block DIG:DATA2:TRAC:WORD first_block first_block to 16-bit port 2. Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 86: Digital:datan[:Type][:Value]
27 (00011011) DIG:DATA3 27 to 8-bit port 3. DIG:DATA3 #B00011011 writes the same byte of data as in the example above to port 3, but in binary format. 84 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 87: Digital:datan[:Type][:Value]
• Related Commands: [SOURce:]DIGital:DATA :BIT [SOURce:]DIGital:DATA :POLarity • *RST Condition: All ports are set for data input. Example returns the decimal equivalent of the data lines on 8-bit port 3. DIG:DATA3? Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 88: Digital:flagn:polarity
FLAG Example uses long commands to query the state of SOURCE:DIGITAL:FLAG0:POLARITY? the logical true condition on port 0. performs the same function as the example above with short DIG:FLAG0:POL? commands. 86 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 89: Digital:handshaken:delay
*RST Condition: Delay is set to 2 Example DIG:HAND3:DEL .005 sets the delay between the data output and the assertion of the control line to true on 8-bit port 3 to 5 ms. Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 90: Digital:handshaken:delay
• Related Commands: [SOURce:]DIGital:HANDshake :DELay [SOURce:]DIGital:CONTrol :POLarity • *RST Condition: Mode is NONE on all ports. Example sets the handshake mode to LEADing on 8-bit port 3. DIG:HAND3 LEAD 88 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 91: Digital:handshaken[:Mode]
• n is the keyword used for commands relating to the I/O line at port n. The port number n must be the last character of the keyword without spaces. Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 92: Digital:trace:catalog
Since the ASCII character A has a decimal value of 65, the equivalent of 65 is stored in the first byte of first_block (and so on). 90 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 93: Digital:trace[:Data]
MEMory:VME:STATe OFF create blocks in the system memory. Example DIG:TRAC:DEF first_block, 256 defines a 256 byte user memory block named first_block and fills each byte with a zero. Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 94: Digital:trace:define
< > DIGital:TRACe:DEFine The maximum length for name is 12 characters. < > Example DIG:TRACe:DEL first_block deletes a user memory block named first_block. 92 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 95: Status Subsystem
:CONDition? :ENABle :ENABle? [:EVENt]? :PRESet :QUEStionable :CONDition? :ENABle :ENABle? [:EVENt]? Note This subsystem is provided for compatibility. The Digital I/O module does not use the Operation Status or Questionable Status Registers. Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 96: Operation:condition
IEEE-488.2. :OPERation:ENABle? STATus:OPERation:ENABle? returns the mask set for the Operation Status Register. This command does not affect the Agilent E1330 Digital I/O module. :OPERation[:EVENt]? STATus:OPERation[:EVENt]? returns the contents of the Operation Event Status Register. Reading the register clears all bits in the register. This command does not affect the Agilent E1330 Digital I/O module.
Page 97: Questionable:condition
IEEE-488.2. :QUEStionable:ENABle? STATus:QUEStionable:ENABle? returns the mask set for the Questionable Status Register. This command does not affect the Agilent E1330 Digital I/O module. :QUEStionable[:EVENt]? STATus:QUEStionable[:EVENt]? returns the contents of the Questionable Status Event Register. Reading the register clears all bits in the register. This command does not affect the Agilent E1330 Digital I/O module.
Page 98: System Subsystem
This command is only available when using the downloaded SCPI driver. • The command returns the following string (revision number may vary and the serial number is always set to 0): HEWLETT-PACKARD,E1330B,0,A.05.00 96 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 99: Error
SCPI version to which this instrument complies. SYSTem:VERsion? Comments Returns a decimal value in the form: YYYY.R where YYYY is the year, and R is the revision number within that year. Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 100: Ieee 488.2 Common Commands
IEEE 488.2 Common Commands The following table lists the IEEE 488.2 Common (*) Commands that can be executed by the Agilent E1330B Digital I/O Module. For more information on Common Commands, refer to ANSI/IEEE Standard 488.2-1987. Note These commands apply to many instruments and are not documented in detail here.
Page 101: Command Quick Reference
Command Quick Reference The following tables summarize SCPI Commands for the Agilent E1330B Digital I/O module. Command Description DISPlay: <port> Sets the displayed monitor port number. MONitor:PORT [AUTO |MIN|MAX|DEF] Returns the monitored port number. MONitor:PORT? [<MAX|MIN|DEF>] Turns the monitor mode of the display ON or OFF.
Page 102 Selects type of handshake to transfer data between 8-bit port DIGital:HANDshake [:MODE] <NONE|LEADing|TRAiling| and peripheral. Handshakes are initiated by execution of PULSe|PARTial|STRobe> DIG:DATA or MEAS:DIG:DATA ? commands. DIGital:HANDshake [:MODE]? Returns the current handshake mode set on 8-bit port 100 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 103 Returns a string of the module number CTYPe? < number > (download SCPI driver only). Returns the contents of the system Error Register. ERRor? Returns the SCPI version to which this instrument complies. VERsion? Chapter 5 Agilent E1330B Digital I/O Module Command Reference...
Page 104 Notes: 102 Agilent E1330B Digital I/O Module Command Reference Chapter 5...
Page 105: Agilent E1330B Digital I/O Specifications
Appendix A Agilent E1330B Digital I/O Specifications Logic Levels: TTL Compatible, 5V max Data Lines: Iout (High): -5.2 mA @ Vout (High): 2.5 V (Pull-up Enabled) Iout (Low): 48 mA @ Vout (Low): 0.5 V Vin (High): >2.0 V; <5.0 V Vin (Low): <0.8 V...
Page 106 Humidity: 65%, 0º to 40 ºC Operating Temperature: 0º to 55 ºC Storage Temperature: -40º to 75ºC EMC, RFI, Safety: meets FTZ 1046/1984, CSA 556B, IEC 348, UL 1244 Net Weight (kg): 104 Agilent E1330B Digital I/O Specifications Appendix A...
Page 107: Agilent E1330B Digital I/O Module Register Information
VXI A16. The exact location of A16 within a VXIbus master's memory map depends on the design of the VXIbus master you are using; for the Agilent E1300/1301 Mainframe and Agilent E1405/E1406 Command Module, the A16 space location starts at...
Page 108: The Base Address
A16 address space is outside or inside the Agilent E1405/06 Command Module. A16 Address Space When the Agilent E1405/06 Command Module is not part of your VXIbus Outside the Command system (Figure B-1), the Agilent E1330's base address is computed as:...
Page 109 A16 Address Space When the A16 address space is inside the Agilent E1405/06 Command Module (Figure B-2), the module's base address is computed as: Inside the Command Module or Mainframe 1FC000 + (LADDR * 40) 2,080,768 + (LADDR * 64)
Page 110: Register Offset
(positive select code = byte read or write offset = register number negative select code = word read or write) SICL IWPOKE(Base_addr+offset,data) imap(id,I_MAP_VXIDEV,O,0,NULL) IWPEEK(Base_addr+offset) -------- - LADDR = Agilent E1330 Logical Address = 108 Agilent E1330B Digital I/O Module Register Information Appendix B...
Page 111: Reset And Registers
All other bits of all registers are set to "0". Register Definitions You can program the Agilent E1330A/B Quad 8-bit Digital I/O module using its hardware registers. The procedures for reading or writing to a register depend on your operating system and programming language.
Page 112 Registers have been documented as 8 bit bytes. If you access them using 16 bit transfers from a Motorola CPU, the high and low byte will be swapped. The Agilent E1300/01 Mainframe and Agilent E1405/06 Command Modules use Motorola CPUs.
Page 113: Register Descriptions
The Manufacturer Identification Register is a read-only register at address (Most Significant Byte (MSB)) and 01 (Least Significant Byte Identification (LSB)). Reading this register returns the Agilent Technologies Register identification, FFFF Device The Device Identification Register is a read-only register accessed at address .
Page 114: Port Interrupt Control Register
"1" and IEN is set to "1" in the Status/Control Register. PIEN (Port Interrupt Enable) When set to "1", enables interrupt. Pending or forced interrupts are ignored if set to "0". Figure B-3. Interrupt Line Logic Diagram 112 Agilent E1330B Digital I/O Module Register Information Appendix B...
Page 115: Port Transfer Control Register
Port Normalization Register is "0", a rising-edge (low to high) transition caused the interrupt. If bit 4 is set to "1", a falling-edge (high to low) transition caused the interrupt. Refer to the Port Normalization Register for more information. Appendix B Agilent E1330B Digital I/O Module Register Information...
Page 116: Port Control/Status Register
"1" to change RES to the high state. The peripheral will then operate normally. To reset the peripheral, clear bit 5 to "0", putting RES in the low state. 114 Agilent E1330B Digital I/O Module Register Information Appendix B...
Page 117: Port Data Register
Port Transfer Control Register: DRR (bit 0), TI (bit 5), and PI (bit 7). Bits 0-7 Bits 0-7 of the Port Data Register correspond to data lines D(0-7) where bit 7 is the most significant bit. Appendix B Agilent E1330B Digital I/O Module Register Information...
Page 118: Port Handshake Register
BUSY state and resumes when STS returns to the READY state. HT(5-7) (Handshake Type) These bits determine the type of handshake for port input and output transfers as shown in Table B-4. 116 Agilent E1330B Digital I/O Module Register Information Appendix B...
Page 119: Port Delay Register
15; hence, the delay factor is 150 µs. The actual delay for a given transfer may be one count longer due to uncertainty in recognizing a transition of a handshake signal. Appendix B Agilent E1330B Digital I/O Module Register Information...
Page 120: Port Normalization Register
This bit specifies the logic sense of the port data lines. If bit 7= "0", then positive-true logic is used: HIGH= TRUE, LOW =FALSE. If bit 7= "1", then negative-true logic is used: LOW = TRUE, HIGH =FALSE. 118 Agilent E1330B Digital I/O Module Register Information Appendix B...
Page 121: A Register-Based Output Algorithm
The actual path followed by the peripheral and the Digital I/O module to set this bit is controlled by the handshake mode you select. Appendix B Agilent E1330B Digital I/O Module Register Information...
Page 122: A Register-Based Input Algorithm
Once the flag is TRUE the computer can read new data from the port. The actual path followed by the peripheral and the Digital I/O module to set this bit is controlled by the handshake mode you select. 120 Agilent E1330B Digital I/O Module Register Information Appendix B...
Page 123: Programming Examples
Using an Embedded Computer System The following example programs were developed with the module at logical address 144. The BASIC/UX programs were developed using the Agilent E1300 Configuration Mainframe Series B BASIC language. The C language programs were developed on an HP Vectra PC (IBM PC compatible) using Borland's Turbo C++...
Page 124: Resetting The Module
Resetting the The following program resets the Agilent E1330 Digital I/O module (Bit 6 of the Port Control/Status Register set to "1" then to"0"). Reset enables all four ports for Module input, all other bits of other registers set to "0" IBASIC Version.
Page 125: Reading The Id, Device Type, And Status Registers
350 PRINT Reg_name$(number);" = "; IVAL$(Register, 16) 360 NEXT Number 370 SUBEND This program returns: Identification Register = FFFF Device Register = FF50 Status Register = (dependent on current status, default is FFBE) Appendix B Agilent E1330B Digital I/O Module Register Information...
Page 126 IOEOI (7L, 0); IOEOL (7L, " ", 0); IOOUTPUTS (70900L, "DIAG:PEEK? ", 11); IOEOI (7L, 1); IOEOL (7L, state, 2); IOOUTPUTA (70900L, send_data, 2); IOENTER(70900L, &read); printf("/nStatus Register = %0x",read); return 0; 124 Agilent E1330B Digital I/O Module Register Information Appendix B...
Page 127: Writing An 8-Bit Byte
170 UNTIL BIT(READIO ( 9826,Base_addr+DVAL("0D",16)),1) 180 !If more data to send, repeat lines 140 - 170. 190 WRITEIO 9826,Base_Addr+DVAL("0D",16);0 200 !Clears Port 1 Transfer Control Register bit 1 to Disable Handshake. 210 END Appendix B Agilent E1330B Digital I/O Module Register Information...
Page 128 0; void send_info(char state[], float send_data[] IOEOI (7L, 0);IOEOL (7L, " ", 0); IOOUTPUTS (70900L, "DIAG:POKE ", 10); IOEOI (7L, 1);IOEOL (7L, state, 0); IOOUTPUTA (70900L, send_data, 3); 126 Agilent E1330B Digital I/O Module Register Information Appendix B...
Page 129: Writing A 16-Bit Word
210 !Clears Ports 0 & 1 Transfer Control Register bit 1 to Disable Handshake. 220 END C Version The C program is similar to that shown for writing an 8-bit byte except the data sent to the registers must be 16 bits. Appendix B Agilent E1330B Digital I/O Module Register Information...
Page 130: Reading An 8-Bit Byte
160 Print A 170 !If more data to send, repeat lines 150 - 160. 180 WRITEIO 9826,Base_Addr+DVAL("0D",16);0 190 !Clear Port 1 Transfer Control Register bit 1 to Disable Handshake. 200 END 128 Agilent E1330B Digital I/O Module Register Information Appendix B...
Page 131 IOEOI (7L, 1); IOEOL (7L, state, 2); IOOUTPUTA (70900L, send_data, 2); IOENTER (70900L, &read); printf("\nData read from module = %X",(int)read); send_data[0] = BASE_ADDR + transfercont_reg; send_data[2] = 0; send_info(state, send_data); return 0; void send_info(char state[], float send_data[]) Appendix B Agilent E1330B Digital I/O Module Register Information...
Page 132: Reading A 16-Bit Word
In order for this shell to catch errors and time outs, all application codes must start in the Subprogram Main (lines 390-680). The subprogram Reg_dump (lines 760-910) will read all registers on the Agilent E1330 and display them in both decimal and hex format. When developing a program you may temporarily place calls to Reg_dump in your program.
Page 133: Pir Interrupts On The Agilent E1330
PIR Interrupts This example demonstrates how to use the four PIR interrupt lines that exist on the Agilent E1330A/B digital I/O module. This example produces true interrupts from on the these lines. Register programming must be used to access this capability as the Agilent E1330 Agilent E1330 SCPI driver does not use these lines.
Page 134 Agilent E1300/01. Firmware revision A.07 or later is required. The two IRQ jumpers on the Agilent E1330 have been moved from the normal IRQ1 position to the IRQ2 position (you must move both of them!). This is necessary so the system instrument can catch interrupts instead of the operating system, which handles all interrupts on IRQ1.
Page 135 !Enable the E1330 to produce PIR interrupts. Enable_pir0 Enable_pir1 Enable_pir2 Enable_pir3 Enable_int ON INTR 7,2 CALL Intr_ser ENABLE INTR 7;2 !This is just a wait loop. LOOP PRINT TIMEDATE WAIT .5 Appendix B Agilent E1330B Digital I/O Module Register Information...
Page 136 1060 PRINT "PIR0 OCCURRED" 1070 Enable_pir0 1080 END IF 1090 IF BIT(Int_ack,8)=0 THEN 1100 PRINT "PIR1 OCCURRED" 1110 Enable_pir1 1120 END IF 1130 IF BIT(Int_ack,11)=0 THEN 1140 PRINT "PIR2 OCCURRED" 134 Agilent E1330B Digital I/O Module Register Information Appendix B...
Page 137 COM /Instr/ @Sys,@Dig 1550 COM /Register/ Logical_address 1560 Base=2031616+49152+(Logical_address*64) 1570 OUTPUT @Sys;"DIAG:POKE "&VAL$(Base+(DVAL("0D",16)))&",8,0" !PI=0 1580 OUTPUT @Sys;"DIAG:POKE "&VAL$(Base+(DVAL("09",16)))&",8,128" ! PIEN=1 1590 OUTPUT @Sys;"DIAG:POKE "&VAL$(Base+(DVAL("0D",16)))&",8,128" ! PI=1 1600 Enable_pir1_:SUBEND 1610 ! 1620 Enable_pir2:SUB Enable_pir2 Appendix B Agilent E1330B Digital I/O Module Register Information...
Page 138: Agilent E1330B Non-Data Line I/O
!PIEN=1 1840 Enable_pir3_:SUBEND Agilent E1330 The Agilent E1330 has several signal lines other than the data lines which can be individually controlled. These lines are the FLG, CTL, STS, RES, and PIR lines. B Non-data The following BASIC language program demonstrates how to control these lines.
Page 139 !This subroutine is treated as the main line. COM @Sys,@Dvm,@Dig Cnt_flg_io !Demonstrate driving CONTROL0, receiving FLAG0. Res_sts_io !Demonstrate driving RES0, receiving STS0. Res_pir_io !Demonstrate driving RES0, receiving PIR0. Res_pi_io !Demonstrate driving RES0, receiving PI0. !Put Application code here. Appendix B Agilent E1330B Digital I/O Module Register Information...
Page 140 !Use register programming to use RES0 & PIR0. COM @Sys,@Dvm,@Dig PRINT “” PRINT “SUBPROGRAM Res_pir_io” OUTPUT @Dig;"*RST" !RESET to power on state. Ladd=80 1000 !Base=Start of A16+Offset to VXI Reg+Offset to card Reg. 1010 Base=2031616+49152+(Ladd*64) 138 Agilent E1330B Digital I/O Module Register Information Appendix B...
Page 141 Bit1=BIT(A,1) 1420 PRINT “RES0 DRIVEN TO 1, PIR0 RECEIVED AS ”;Bit1 1430 OUTPUT @Sys;"DIAG:PEEK? "&VAL$(Base+(DVAL("0C",16))) &",8" !Read PI. 1440 ENTER @Sys;A 1450 Bit7=BIT(A,7) 1460 PRINT “PERIPHERAL INTERRUPT = ”;BIT7 1470 SUBEND Appendix B Agilent E1330B Digital I/O Module Register Information...
Page 142: Embedded Computer Example
Embedded The following example was developed with the module at logical address 144. The C language programs were developed on an Agilent V382 using ANSI C Computer programming language and SICL (Standard Instrument Control Library). Example /* C register programming example */ #include <stdio.h>...
Page 143 /* output data bytes to ports 0 and 3, no handshake */ /* port 0 */ ibpoke((base_addr + port_hand_0),0x00); ibpoke((base_addr + port_del_0),0x00); ibpoke((base_addr + port_norm_0),0x00); ibpoke((base_addr + port_ctl_0),0x00); ibpoke((base_addr + port_xfr_0),0x00); ibpoke((base_addr + port_data_0),pattern_1); Appendix B Agilent E1330B Digital I/O Module Register Information...
Page 144 "); exit (-1); } data_byte = ibpeek(base_addr + port_data_1); printf(("port data register value = %02X\n",data_byte); /* disable port handshake */ ibpoke((base_addr + port_xfr_2),0x00); ibpoke((base_addr + port_xfr_1),0x00); return 0; } 142 Agilent E1330B Digital I/O Module Register Information Appendix B...
Page 145: Appendix C Error Messages
Inconsistent parameter value or block not found. -240 Hardware Error Hardware error detected during power-on cycle. Return Digital I/O Module to Agilent Technologies for repair. -410 Query Interrupted Data is not read from the output buffer before another command is issued.
Page 146 Notes: 144 Error Messages Appendix C...
Page 147 Index Agilent E1330B User’s Manual Symbols Address (continued) space defined *CLS switch, setting *DMC VME memory *EMC Algorithm *EMC? input register-based *ESE output register-based *ESE? *ESR? *GMC *IDN Base Address – *LMC Binary Format *OPC *OPC? input 35, 50 *PMC numbers –...
Page 148 VXIbus MEASure subsystem – isolated digital I/O MEMory subsystem – system parameters the Agilent E1330B – SCPI command format – Connecting SOURce subsystem – computers to peripherals – STATus subsystem – digital I/O cables SYSTem subsystem –...
Page 149 Data Lines (continued) (continued) ports Control Lines pull-up – setting polarity – specify logic sense termination TTL levels polarity Debugging Programs Decimal Format setting value Default and Reset States specify logic sense Deleting automatic data handshaking CTL Control Line – macros clearing value memory data blocks...
Page 150 Handshake (continued) using CTL line Flag Control Line using FLG line See FLG Control Line with peripheral Flag Line Header Connector polarity Hexadecimal Format query status IBASIC Examples specify logic sense reading FLG Control Line an 8-bit byte combining registers description resetting the module factory setting...
Page 151 (continued) Internal Pull-up Macro, deleting Interrupts Manufacturer ID Register disable MEASure Subsystem – flags MEASure:DIGital:DATAn line [:BYTE]BITm? peripheral [:BYTE]TRACe PIR control line [:BYTE][:VALue]? setting priority :LWORd:BITm? VXIbus :LWORd:TRACe :LWORd[:VALue]? [:type]BITm? [:type]TRACe Jumpers [:type][:VALue]? flag combining :WORD:BITm? hardware configuration :WORD:TRACe interrupt line :WORD[:VALue]? JM15 and JM16 MEASure:DIGital:FLAGn?
Page 152 (continued) Multiple Parameters port PARTial Handshake Mode – – handshaking input/output Peripheral operations connecting to computers – ports GPIO, connecting to – single handshake line handshake specifying interrupt SCPI commands, linking interrupts pinout – reset Non-Data Line I/O Peripheral Control Line NONE Handshake Mode –...
Page 153 (continued) Ports (continued) Query peripheral interrupt request (PIR) line data reset (RES) line bits specifying blocks available specifying multiple lines polarity status (STS) line error register transfer control register external memory state transfer mode flag line type combinations allowed polarity writing data to status –...
Page 154 Reset States (continued) Resetting Module Register-Based Ribbon Cable debugging programs connecting input algorithm pins – output algorithm replacement programming examples *RMC Registers *RST addressing – base address – card status/control condition register – *SAV definitions – SCPI descriptions – drivers, downloading Device Identification Register status registers event register...
Page 155 [SOURce:]DIGital:DATAn (continued) (continued) :WORD:BITm Setting (continued) :WORD:BITm? handshake mode – :WORD:HANDshake:DELay interrupt line :WORD:HANDshake:DELay? polarity :WORD:HANDshake[:MODE VME external memory :WORD:HANDshake[:MODE]? Soft [SOURce:]Front Panel (VXIplug&play) :WORD:POLarity See online help :WORD:POLarity? SOURce Subsystem – :WORD:TRACe [SOURce:]DIGital:CONTroln :WORD[:VALue] :POLarity :WORD[:VALue]? :POLarity? [SOURce:]DIGital:FLAGn [:VALue] :POLarity [:VALue]? :POLarity?
Page 156 Transfer Mode to ports – Transition Filters *TRG *TST? [:type] keyword described substitutions – – port combinations allowed Typical Driver/Receiver Connection Understanding the Agilent E1330B – Using external pull-ups handshake mode – – the Agilent E1330B – trace memory – Index...

Agilent Technologies E1330B User's Manual And Scpi Programming Manual

Chapter 1 Getting Started

Chapter 2 Configuring the Agilent E1330B Digital I/O Module

Chapter 3 Using the Agilent E1330B Digital I/O Module

Chapter 4 Understanding the Agilent E1330B Digital I/O Module

Chapter 5 Agilent E1330B Digital I/O Module Command Reference

Appendix A

Agilent E1330B Digital I/O Specifications

Appendix B Agilent E1330B Digital I/O Module Register Information

Appendix C Error Messages

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