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SS: KEBOARD
The SS:KEYBOARD interface is available but not brought out to a connector. It can be
implemented with software drivers through the SPI feature of the 68HC11. Such a configuration is
used with a serially encoded keyboard. This port can also be used as a keypad by using PD<2:5>
as column lines with E<1:4> as row lines. Note that E<1:4> are open termination's with pull-down
resistors on the board. E<1:4> are ONLY connected to pins 7, 8, 9, and 10 of the SS:KEYBOARD
connector. In order to use those pins, E<1:4> must be connected to I/O lines. AUX_PORT C is
recommended because it is capable of nibble or 4 bit configuration. While such a dual parallel
matrix will work, it dedicates the SPI to keypad use only. If implemented through the SPI as a
SIMPLE SERIAL port, four separate, additional SPI serial devices can be supported by the SEL
lines defining E<1:4> for a total of five slave serial devices. (Note: this still requires E<1:4> be
connected. Each to its own I/O line, but this will support four additional peripheral devices.)
¨
1
+5
¡
2
GND
¡
3
PD2/SI
¡
4
PD3/SO
¡
5
PD4/SCLK
¡
6
PD5/SEL0
¡
7
SEL1
¡
8
SEL2
¡
9
SEL3
¡
10
SEL4
See the files called KLCD-E.C, KEYLCD-E.C, KEYLCD-E.ASM on the support CD for example
programs using this connector.
PARALLEL PORTS
The 68HC11 is configured for expanded/multiplexed mode. It uses Port B and Port C for address
and data buss to external memory and memory mapped I/O devices. This leaves CPU Port D,
Port A, and Port E to provide all other parallel I/O from the controller. CPU port lines are mixed as
input only, output only, and some are input or output. All CPU port lines serve dual functions with
internal CPU peripherals such as the timer subsystem and port A, the A/D converter on port E, and
the SPI or SCI on port D.
To increase general purpose input/output
memory mapped onto the data buss providing three auxiliary ports. The auxiliary port lines are all
input or output configurable and are available on the AUX_PORT connector. All port lines are
limited to sinking and sourcing approximately 1mA. maximum. Refer to Chapter 6 Memory Map
and Appendix C for more information on the 82C55.
Auxiliary select lines terminated to ground
(10kohm)
capability an 82C55 peripheral port expander is
14
SPI
E1
E2
E3
E4
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