Pf Motor Driver Circuit; Eeprom Control Circuit - Epson FX-2170 Service Manual

Operating Principles

2.3.5 PF Motor Driver Circuit

The figure below shows the PF motor driver circuit.
Gate
Array
PP
PP
PP
G2
G3 G1
7 8 9
7 6
8
PG PG PG
13 12 11
P27
CPU
61
The gate array receives phase data from the CPU via ports 5 (PG10), 6 (PG11), 7 (PG12), and 8 (PG13),
converts the data to UDN2917 form, and then sends that phase data to ports 43 (PH1) and 26 (PH2). The PF
driver current is controlled by the 74LS32 using port 68 (PF1) and 67 (PF2) signals output from the gate array
and port 61 (P27) output from the CPU. These controlled drive currents are output to ports 2 (I10), 1 (I11), 23
(I20), and 24 (I21) of the UDN2917EB.

2.3.6 EEPROM Control Circuit

The EEPROM is non-volatile memory that stores information even if the printer power is off. The figure
below shows the EEPROM control circuit.
The EEPROM is controlled by CPU ports 9 (P70), 10 (P71), 11 (P72), and 12 (P73). Port 11 is the data
output line used to save the information to the EEPROM, and port 12 is the data input line used to read the
saved data from the EEPROM. Port 70 is the chip select line, and port 71 is the clock timing line. When the
PWDN signal (power down) is detected on port 20 (INTO), the CPU writes the necessary data to the
EEPROM before the +5 V line drops to 4.75 V.
2-26
68
PFI1
67
PFI2
HOLD 66
PP
G0
10
5
PG
10
Figure 2-36 PF Motor Driver Circuit
9
P70
10
P71
CPU
11
P72
12
P73
Figure 2-37 EEPROM Control Circuit
IC6
74LS32
1
3
2
I10
I11
I20
4
6
I21
5
42
VREF1
27
VREF2
43
PH1
26
PH2
IC11
UDN2917EB
1
CS
2 IC 8
CK
3
EEPROM
DI
4
DO
FX-2170 Service Manual
1
6
PF A
A
3
2
A PF-A
3
18
PF B
B
21
4
B PF-B
Rev.A