ECS A880GM-M6 User Manual page 46

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DRAM Frequency (Auto)
This item enables users to adjust the DRAM frequency. The default setting is auto and
we recommend users leave the setting unchanged. Modify it at will may cause the
system to be unstable.
DRAM Timing Mode (Auto)
This item enables you to specify the DRAM timing mode to be configured automati-
cally or manually.
Bank Interleaving (Auto)
This item is used to set the bank interleaving.
Channel Interleaving (XOR of Address bits)
This item is used to set the channel interleaving.
Memory CLK (533 MHz, N/A)
This item is used to set the memory clock mode.
CAS Latency (Tcl) (8 CLK, N/A)
This item controls the timing delay (inclockcycles) before the DRAM starts a read
command after receiving it.
RAS/CAS Delay (Trcd) (8 CLK, N/A)
This is the amount of time a CAS is performed after a RAS. The lower the better, but
some DRAM does not support low figures.
Row Precharge Time (Trp) (8 CLK, N/A)
This item specifies the Row precharge to Active or Auto-Refresh of the same bank.
Min Active RAS (Tras) (20 CLK, N/A)
.
This item determins the time RAS takes to read from and write to a memory cell
RAS/RAS Delay (Trrd) (4 CLK, N/A)
This item specifies the active-to-active delay of different banks.
Row Cycle (Trc) (27 CLK, N/A)
Use this item to specify the Row Cycle Time.
Press <Esc> to return to the M.I.B.II page.
Advanced Clock Calibration (Disabled)
This item can enable greater performance turning margin for the AMD
PhenomTMBlack Edition CPUs. The optimal gain can be seen in configurations
that use high-end CPU cooling solution in combination with elevated CPU core
voltage (CPUVID) value. The motherboards that support "anvanced Clock Calibra-
tion" feature should enable power delivery capabilities that exceed the 125W CPU
TDP specifica-tions in order to maximize the performance tuning potential.
CoreX Control (Disabled)
This item allows you to enable or disable CoreX control.
CPU Frequency Ctrl (Auto)
This item allows user to enable or disable CPU frequency control.
Using BIOS