Sony PCM-1630 Operation And Maintenance Manual page 81

-16
MT-16
BLOCK DIAGRAM
WDCK CONTROL
CLOCK
BITCK GEN
5J,5K
6J,6K,6L
DT ME
~
o-----+-_.,.
DT DA
~~
DATA
SEL
RAW DT
~
o-----+--1
D~B/EDT
I - -
t - -
t - - - -
CH-1
CH-2
7C
CH-1
.....-
t-
S/P
I- t-
5E
5H
CH-2
.....-
t-
S/P
t - -
........... 50
5F
POLARITY
~
a:
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1-
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1-
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40, 4E
4F,4H
OVER LEVEL DETECTOR
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r - - ""'\
PEAK
rl
DET
3J,4J
PEAK
SEQU-,_
ENCE
!!."r;.!
2K. 4K
~..-,.....;2L. 4L
J
L . . . - - - - - - · 1 - - - - - 1 - - - -1-
~B
CH-1 CH-1
L.,~
~
BUS
LATDf
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CH-2 CH-2
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z
0
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L., BUS
1 - - -
r
LATDf
1aurt1:t
H
a:
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0
u
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,...--
SCALE
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PEAK
PEAK hOLD
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HR1
ro--
I
I I
'
HAS
48
CLOCK
osc
CPU
1C
r - - -
f-:---o> r---1---- MOO
1-
Ill
I/0 : :
I
A . - -
::>
L....--,.
I
DIGIT
I
v
Cil '
EX- :
I
l'v-
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PANDER : IJIIVEII
I
H
PORT : :
.....___~~~-----
MD15
3C QHH6
1----t--t--------1,--l-- MA 1
SEG
I--
MA2
1----t-t---------IIJII.~ MA3
I -
I--
MA4
Q"i7-G24
RESET
L
PULSE
r
l-.1.., MODE
SELECT
4 - - - - - - - - - - - - - l l 11K. 1L
4C
-
L------------------------------------------;~-422r-------
L__~-------------------------------------------_,DRIVERr-------
A WDCK
A BITCK
A DT1
A DT2
REC/PB SW
o-----~ F/F~-~-----------------------------------------------------------------------------------
REC/PB
6J
MT-16 BOARD BLOCK DIAGRAM
8-23
B-24
BLOCK DIAGRAM
MT-16