Advanced Chipset Settings
Configure DRAM Timing by SPD
Hyper Path 2
Booting Graphic Adapter Priori [PCI Express/PCI]
PEG Buffer Length
Link Latency
PEG Link Mode
PEG Root Control
Slot Power
[Enabled]
[Auto]
[Auto]
[Auto]
[Auto]
[Auto]
[Auto]
+
Select Screen
Select Item
Ch
O ti
4-25