Since 1996, HP and AMD have collaborated to provide high-performance, energy efficient
solutions that deliver quality, variety, and value in industry-standard servers. This collaboration
includes the adoption of the latest multi-core AMD Opteron™ processors. This technology brief
discusses current and near future AMD Opteron processors and the evolving AMD Opteron
The AMD Opteron family of processors is AMD's offering for the industry-standard server market.
HP is providing AMD processors in the ProLiant server product line to offer enterprise customers
expanded options for improved performance while maintaining cost-effective infrastructures.
AMD Opteron processors are based on the X86 architecture with AMD64 technology and feature
an integrated memory controller and the Direct Connect I/O Architecture, which uses
HyperTransport™ technology. In addition, AMD multi-core processors feature AMD Virtualization™
and AMD PowerNow!™ technologies.
AMD Opteron processors adhere to the x86 instruction set architecture to be compatible with the
wealth of 32-bit software applications available. In other words, at the software/hardware
interface, the software interface of the AMD Opteron processor remains the same with regard to
the memory addressing size, the instruction sets, and the register designs for the x86 architecture.
A 32-bit processor has general-purpose registers (GPRs) that are 32 bits wide and can operate on
an integer data stream that is 32 bits wide. In addition, a 32-bit processor can hold 32 bits of
memory address data in a single register, for a maximum of 4 GB of addressable memory.
The x86 architecture supports physical addressing extensions (PAE), which extend the address
space to allow addressing to 36 bits for a maximum of 64 GB of physical addressable memory.
However, this requires the OS and applications to take advantage of the additional memory
addressing. AMD Opteron processors support 32-bit addressing as well as the 36-bit PAE.
As shown in Table 1, the x86, 32-bit instruction set of the AMD Opteron family of processors
includes the following:
• Standard x86 instructions, which are general-purpose arithmetic functions
• Single Input Multiple Data (SIMD) Instructions, which let one command work simultaneously on
multiple data items. This includes Streaming SIMD Extensions (SSE), SSE2, SSE3, and SSE4a
• x87 floating point instructions