Acer Altos R310 Service Manual page 62

Checkpoint Code
4Eh
4Fh
50h
51h
52h
54h
55h
58h
59h
5Ah
5Bh
5Ch
60h
62h
64h
66h
67h
68h
69h
6Ah
Chapter 4
Beep Code
Display copyright notice.
Initialize MultiBoot. Allocate memory for old and new
MultiBoot history tables.
Display CPU type and speed.
Checksum CMOS and initialize each EISA slot with
data from the initialization data block.
Verify keyboard reset.
Initialize keystroke clicker if not enabled in Setup.
Enable USB devices.
2-2-3-1 Test for unexpected interrupts. First do an STI for hot
interrupts. Secondly, test the NMI for an unexpected
interrupt. Thirdly, enable the parity checkers and
read from memory, checking for an unexpected
interrupt.
Register POST Display Services, fonts, and
languages with the POST Dispatch Manager.
Display prompt °Press F2 to enter SETUP".
Disable CPU cache.
Test RAM between 512K and 640K.
Determine and test the amount of extended memory
available. Determine if memory exists by writing to a
few strategic locations and see if the data can be
read back. If so, perform an address-line test and a
RAM test on the memory. Save the total extended
memory size in the CMOS at cmosExtended.
Perform an address line test on A0 to the amount of
memory available. This test is dependent on the
processor, since the test will vary depending on the
width of memory (16 or 32 bits). This test will also
use A20 as the skew address to prevent corruptionof
the system memory.
Jump to UserPatch1. See "The POST Compo-nent."
Set cache registers to their CMOS values if CMOS is
valid, unless auto configuration is enabled, in which
case load cache registers from the Setup default
table.
Quick initialization of all Application Processors in a
multi-processor system.
Enable external cache and CPU cache if
present.Configure non-cacheable regions if
necessary.
NOTE: Hook routine must preserve DX, which
carries the cache size to the Display CacheSizeJ
routine.
Initialize the handler for SMM.
Display external cache size on the screen if it is non-
zero.
NOTE: Hook routine must preserve DX,which carries
the cache size from the cache ConfigureJ routine.
Description
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