MSI P6NGM-FIH - Motherboard - Micro ATX User Manual page 54

tCL (CAS Latency)
W hen the Memory Timings sets to [Manual], the field is adjustable.This con-
trols the CAS latency, which determines the timing delay (in clock cycles) before
SDRAM starts a read command after receiving it.
tRCD
W hen DRAM is refreshed, both rows and columns are addressed separately.
This setup item allows you to determine the timing of the transition from RAS
(row address strobe) to CAS (column address strobe). The less the clock
cycles, the faster the DRAM performance.
tRP
W hen the Memory Timings sets to [Manual], the field is adjustable. This item
controls the number of cycles for Row Address Strobe (RAS) to be allowed to
precharge. If insufficient time is allowed for the RAS to accumulate its charge
before DRAM refresh, refreshing may be incomplete and DRAM may fail to retain
data. This item applies only when synchronous DRAM is installed in the system.
tRAS
W hen the Memory Timings sets to [Manual], the field is adjustable. This setting
determines the time RAS takes to read from and write to a memory cell.
Command Per Clock (CMD)
This field controls the SDRAM command rate. Selecting [1T] makes SDRAM
signal controller to run at 1T (T=clock cycles) rate. Selecting [2T] makes SDRAM
signal controller run at 2T rate.
tRRD
W hen the Memory Timings sets to [Manual], the field is adjustable. Specifies
the active-to-active delay of different banks.
tRC
W hen the Memory Timings sets to [Manual], the field is adjustable. The row
cycle time determines the minimum number of clock cycles a memory row takes
to complete a full cycle, from row activation up to the precharging of the active
r ow.
tWR
W hen the Memory Timings sets to [Manual], the field is adjustable. Minimum
time interval between end of write data burst and the start of a precharge
command. Allows sense amplifiers to restore data to cells.
tWTR
W hen the Memory Timings sets to [Manual], the field is adjustable. Minimum
time interval between the end of write data burst and the start of a column-read
command. It allows I/O gating to overdrive sense amplifiers before read com-
mand starts.
BIOS Setup
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