Analog Devices Super Sequencer ADM1062 Handbook

With margining control and temperature monitoring

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FEATURES

Complete supervisory and sequencing solution for up to

10 supplies

10 supply fault detectors enable supervision of supplies to

better than 1% accuracy

5 selectable input attenuators allow supervision of

supplies up to

14.4 V on VH

6 V on VP1 to VP4

5 dual-function inputs, VX1 to VX5:

High impedance input to supply fault detector with

thresholds between 0.573 V and 1.375 V

General-purpose logic input

10 programmable output drivers, PDO1 to PDO10

Open collector with external pull-up

Push/pull output, driven to VDDCAP or VPn

Open collector with weak pull-up to VDDCAP or VPn

Internally charge-pumped high drive for use with external

N-FET (PDO1 to PDO6 only)

Sequencing engine (SE) implements state machine control of

PDO outputs

State changes conditional on input events

Enables complex control of boards

Power-up and power-down sequence control

Fault event handling

Interrupt generation on warnings

Watchdog function can be integrated in SE

Program software control of sequencing through SMBus

Complete voltage margining solution for 6 voltage rails

6 voltage output, 8-bit DACs (0.300 V to 1.551 V) allow voltage

adjustment via dc-to-dc converter trim/feedback node

12-bit ADC for readback of all supervised voltages

Internal and external temperature sensors

Reference input, REFIN, has 2 input options

Driven directly from 2.048 V (±0.25%) REFOUT pin

More accurate external reference for improved

ADC performance

Device powered by the highest of VP1 to VP4, VH for

improved redundancy

User EEPROM: 256 bytes

Industry-standard, 2-wire bus interface (SMBus)

Guaranteed PDO low with VH, VPn = 1.2 V

40-lead, 6 mm × 6 mm LFCSP and

48-lead, 7 mm × 7 mm TQFP packages

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

Super Sequencer

and Temperature Monitoring

VX1

VX2

VX3

VX4

VX5

VP1

VP2

VP3

VP4

AGND

APPLICATIONS

Central office systems

Servers/routers

Multivoltage system line cards

DSP/FPGA supply sequencing

In-circuit testing of margined supplies

GENERAL DESCRIPTION

The ADM1062 is a configurable supervisory/sequencing device

that offers a single-chip solution for supply monitoring and

sequencing in multiple supply systems. In addition to these

functions, the ADM1062 integrates a 12-bit ADC and six 8-bit

voltage output DACs. These circuits can be used to implement a

closed-loop margining system, which enables supply adjustment

by altering either the feedback node or reference of a dc-to-dc

converter using the DAC outputs.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

™

with Margining Control

FUNCTIONAL BLOCK DIAGRAM

REFIN

REFOUT

REFGND

ADM1062

VREF

TEMP

INTERNAL

SENSOR

DIODE

12-BIT

SAR ADC

CLOSED-LOOP

MARGINING SYSTEM

DUAL-

FUNCTION

INPUTS

(LOGIC INPUTS

SFDs)

SEQUENCING

ENGINE

PROGRAMMABLE

RESET

GENERATORS

(SFDs)

OUT

DAC

DAC1

DAC2

DAC3

DAC4

DAC5

DAC6

Figure 1.

ADM1062

SDA SCL A1

SMBus

INTERFACE

EEPROM

CONFIGURABLE

PDO1

OUTPUT

PDO2

DRIVERS

PDO3

(HV CAPABLE

PDO4

OF DRIVING

PDO5

GATES OF

PDO6

N-CHANNEL FET)

PDO7

CONFIGURABLE

OUTPUT

DRIVERS

PDO8

(LV CAPABLE

PDO9

OF DRIVING

LOGIC SIGNALS)

PDO10

PDOGND

VDD

VDDCAP

OUT

ARBITRATOR

VCCP

GND

(continued on Page 3)

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Summary of Contents for Analog Devices Super Sequencer ADM1062

Page 1 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use.
Page 2 ADM1062 TABLE OF CONTENTS General Description ................. 3 Fault Reporting................19 Specifications..................4 Voltage Readback................20 Pin Configurations and Function Descriptions ......7 Supply Supervision with the ADC ........... 20 Absolute Maximum Ratings............8 Supply Margining ................21 Thermal Characteristics .............. 8 Overview ..................
Page 3 ADM1062 GENERAL DESCRIPTION (continued from Page 1) Supply margining can be performed with a minimum of Temperature measurement is possible with the ADM1062. The external components. The margining loop can be used for device contains one internal temperature sensor and a differen- in-circuit testing of a board during production (for example, to tial input for a remote thermal diode.
Page 4 ADM1062 SPECIFICATIONS VH = 3.0 V to 14.4 V , VPn = 3.0 V to 6.0 V = −40°C to +85°C, unless otherwise noted. Table 1. Parameter Unit Test Conditions/Comments POWER SUPPLY ARBITRATION VH, VPn Minimum supply required on one of VH, VPn. Maximum VDDCAP = 5.1 V, typical.
Page 5 ADM1062 Parameter Unit Test Conditions/Comments Conversion Time 0.44 One conversion on one channel All 12 channels selected, 16x averaging enabled Offset Error ±2 = 2.048 V REFIN Input Noise 0.25 Direct input (no attenuator) TEMPERATURE SENSOR Local Sensor Accuracy ±3 °C VDDCAP = 4.75 V Local Sensor Supply Voltage Coefficient...
Page 6 ADM1062 Parameter Unit Test Conditions/Comments Standard (Digital Output) Mode (PDO1 to PDO10) (pull-up to VDDCAP or VPn) = 2.7 V, I = 0.5 mA to VPn = 6.0 V, I = 0 mA − 0.3 ≤ 2.7 V, I = 0.5 mA 0.50 = 20 mA Maximum sink current per PDO pin...
Page 7 ADM1062 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 48 47 46 45 44 43 42 41 40 39 38 37 PIN 1 PDO1 INDICATOR PDO1 PDO2 PIN 1 PDO2 INDICATOR PDO3 PDO3 PDO4 PDO4 ADM1062 PDO5 ADM1062 PDO5 TOP VIEW PDO6 TOP VIEW (Not to Scale) PDO6 (Not to Scale)
Page 8 ADM1062 ABSOLUTE MAXIMUM RATINGS Table 3. Stresses above those listed under Absolute Maximum Ratings Parameter Rating may cause permanent damage to the device. This is a stress Voltage on VH Pin 16 V rating only; functional operation of the device at these or any Voltage on VP Pins other conditions above those indicated in the operational Voltage on VX Pins...
Page 9 ADM1062 TYPICAL PERFORMANCE CHARACTERISTICS Figure 5. V vs. V Figure 8. I vs. V (VP1 Not as Supply) VDDCAP Figure 9. I vs. V (VH as Supply) Figure 6. V vs. V VDDCAP Figure 7. I vs. V (VP1 as Supply) Figure 10.
Page 10 ADM1062 –0.2 –0.4 –0.6 –0.8 –1.0 10.0 12.5 15.0 1000 2000 3000 4000 (µA) CODE LOAD Figure 11. Charge-Pumped V (FET Drive Mode) vs. I Figure 14. DNL for ADC PDO1 LOAD VP1 = 5V VP1 = 3V –0.2 –0.4 –0.6 –0.8 –1.0...
Page 11 ADM1062 1.005 1.004 1.003 1.002 1.001 VP1 = 3.0V 1.000 VP1 = 4.75V 0.999 20kΩ BUFFER PROBE OUTPUT 47pF POINT 0.998 0.997 0.996 0.995 –40 –20 200mV M1.00µs 756mV TEMPERATURE (°C) Figure 17. Transient Response of DAC Code Change into Typical Load Figure 19.
Page 12 ADM1062 POWERING THE ADM1062 VDDCAP The ADM1062 is powered from the highest voltage input on either the positive-only supply inputs (VPn) or the high voltage 4.75V supply input (VH). This technique offers improved redundancy, because the device is not dependent on any particular voltage 4.75V rail to keep it operational.
Page 13 ADM1062 INPUTS SUPPLY SUPERVISION The resolution is given by The ADM1062 has 10 programmable inputs. Five of these are Step Size = Threshold Range/255 dedicated supply fault detectors (SFDs). These dedicated inputs are called VH and VP1 to VP4 by default. The other five inputs Therefore, if the high range is selected on VH, the step size can are labeled VX1 to VX5 and have dual functionality.
Page 14 ADM1062 INPUT PULSE SHORTER INPUT PULSE LONGER INPUT COMPARATOR HYSTERESIS THAN GLITCH FILTER TIMEOUT THAN GLITCH FILTER TIMEOUT The UV and OV comparators shown in Figure 22 are always PROGRAMMED PROGRAMMED TIMEOUT TIMEOUT looking at VPn. To avoid chattering (multiple transitions when the input is very close to the set threshold level), these compara- tors have digitally programmable hysteresis.
Page 15 ADM1062 VXn PINS AS DIGITAL INPUTS The digital blocks feature the same glitch filter function that is available on the SFDs. This enables the user to ignore spurious As discussed in the Supply Supervision with VXn Inputs transitions on the inputs. For example, the filter can be used to section, the VXn input pins on the ADM1062 have dual debounce a manual reset switch.
Page 16 ADM1062 OUTPUTS external N-channel FET, which is used to isolate, for example, a SUPPLY SEQUENCING THROUGH card-side voltage from a backplane supply (a PDO can sustain CONFIGURABLE OUTPUT DRIVERS greater than 10.5 V into a 1 µA load). The pull-down switches Supply sequencing is achieved with the ADM1062 using the can also be used to drive status LEDs directly.
Page 17 ADM1062 SEQUENCING ENGINE OVERVIEW MONITOR The ADM1062 sequencing engine (SE) provides the user with STATE FAULT TIMEOUT powerful and flexible control of sequencing. The SE implements a state machine control of the PDO outputs, with state changes conditional on input events. SE programs can enable complex control of boards such as power-up and power-down sequence SEQUENCE control, fault event handling, interrupt generation on warnings,...
Page 18 ADM1062 SEQUENCE SEQUENCING ENGINE APPLICATION EXAMPLE STATES The application in this section demonstrates the operation of the SE. Figure 27 shows how the simple building block of a IDLE1 single SE state can be used to build a power-up sequence for a 3-supply system.
Page 19 ADM1062 MONITORING FAULT SEQUENCE DETECTOR DETECTOR The sequence detector block is used to detect when a step in a 1-BIT FAULT DETECTOR sequence has been completed. It looks for one of the inputs to FAULT SUPPLY FAULT the SE to change state and is most often used as the gate for DETECTION successful progress through a power-up or power-down MASK...
Page 20 ADM1062 VOLTAGE READBACK Table 8. ADC Input Voltage Ranges The ADM1062 has an on-board, 12-bit, accurate ADC for SFD Input ADC Input Voltage voltage readback over the SMBus. The ADC has a 12-channel Range (V) Attenuation Factor Range (V) analog mux on the front end. The 12 channels consist of the 0.573 to 1.375 0 to 2.048 10 SFD inputs (VH, VP1 to VP4, and VX1 to VX5) plus two...
Page 21 ADM1062 SUPPLY MARGINING OVERVIEW CLOSED-LOOP SUPPLY MARGINING It is often necessary for the system designer to adjust supplies, A much more accurate and comprehensive method of margining either to optimize their level or force them away from nominal is to implement a closed-loop system. With this technique, the values to characterize the system performance under these voltage of a rail is read back so that it can be accurately margined conditions.
Page 22 ADM1062 means that the current flowing through R1 is the same as the WRITING TO THE DACs current flowing through R3. Therefore, a direct relationship Four DAC ranges are offered. They can be placed with midcode exists between the extra voltage drop across R1 during (Code 0x7F) at 0.6 V, 0.8 V, 1.0 V, and 1.25 V.
Page 23 ADM1062 TEMPERATURE MEASUREMENT SYSTEM The ADM1062 contains an on-chip, band gap temperature If a discrete transistor is used, the collector is not grounded and sensor, whose output is digitized by the on-chip, 12-bit ADC. should be linked to the base. If a PNP transistor is used, the Theoretically, the temperature sensor and ADC can measure base is connected to the DN input and the emitter is connected temperatures from −128°C to +127°C with a resolution of...
Page 24 ADM1062 × BIAS OUT+ THERM DA REMOTE TO ADC THERM DC SENSING TRANSISTOR BIAS OUT– DIODE LOW-PASS FILTER = 65kHz Figure 34. Signal Conditioning for Remote Diode Temperature Sensors ADM1062 ADM1062 2N3904 2N3906 Figure 35. Measuring Temperature Using an NPN Transistor Figure 36.
Page 25 ADM1062 APPLICATIONS DIAGRAM 12V IN 12V OUT 5V IN 5V OUT 3V IN 3V OUT DC-DC1 3.3V OUT ADM1062 5V OUT PDO1 3V OUT PDO2 3.3V OUT 2.5V OUT DC-DC2 PDO3 1.8V OUT 1.2V OUT PDO4 2.5V OUT 0.9V OUT PDO5 POWER_GOOD POWER_ON...
Page 26 ADM1062 COMMUNICATING WITH THE ADM1062 CONFIGURATION DOWNLOAD AT POWER-UP The ADM1062 provides several options that allow the user to update the configuration over the SMBus interface. The The configuration of the ADM1062 (UV/OV thresholds, glitch following options are controlled in the UPDCFG register: filter timeouts, PDO configurations, and so on) is dictated by the contents of RAM.
Page 27 ADM1062 SMBus POWER-UP DEVICE > 2.5V) CONTROLLER LATCH A LATCH B FUNCTION (OV THRESHOLD ON VP1) EEPROM Figure 38. Configuration Update Flow Diagram UPDATING THE SEQUENCING ENGINE The major differences between the EEPROM and other registers are as follows: Sequencing engine (SE) functions are not updated in the same way as regular configuration latches.
Page 28 ADM1062 The device also has several identification registers (read-only), All other devices on the bus remain idle while the selected which can be read across the SMBus. Table 11 lists these registers device waits for data to be read from or written to it. If the with their values and functions.
Page 29 ADM1062 START BY ACK. BY ACK. BY SLAVE MASTER MASTER FRAME 1 FRAME 2 SLAVE ADDRESS DATA BYTE (CONTINUED) (CONTINUED) STOP ACK. BY NO ACK. MASTER FRAME 3 FRAME N MASTER DATA BYTE DATA BYTE Figure 40. General SMBus Read Timing Diagram HD;...
Page 30 ADM1062 • To erase a page of EEPROM memory. EEPROM memory In the ADM1062, the write byte/word protocol is used for three can be written to only if it is unprogrammed. Before purposes: writing to one or more EEPROM memory locations that •...
Page 31 ADM1062 The master sends a command code that tells the slave The master asserts a no acknowledge on SDA. device to expect a block write. The ADM1062 command The master asserts a stop condition on SDA, and the code for a block write is 0xFC (1111 1100). transaction ends.
Page 32 ADM1062 Note that the PEC byte is calculated using CRC-8. The frame check sequence (FCS) conforms to CRC-8 by the polynomial SLAVE COMMAND 0xFD SLAVE BYTE DATA ADDRESS (BLOCK READ) ADDRESS COUNT C ( x ) = x See the SMBus 1.1 specification for details. DATA An example of a block read with the optional PEC byte is shown Figure 49.
Page 33 ADM1062 OUTLINE DIMENSIONS 6.00 0.60 MAX BSC SQ 0.60 MAX PIN 1 INDICATOR PIN 1 0.50 INDICATOR 4.25 5.75 EXPOSED VIEW 4.10 SQ BCS SQ 3.95 (BOTTOM VIEW) 0.50 0.40 0.30 0.25 MIN 4.50 12° MAX 0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM 1.00...
Page 34 ADM1062 ORDERING GUIDE Model Temperature Range Package Description Package Option ADM1062ACP −40°C to +85°C 40-Lead LFCSP_VQ CP-40 ADM1062ACP-REEL7 −40°C to +85°C 40-Lead LFCSP_VQ CP-40 ADM1062ACPZ −40°C to +85°C 40-Lead LFCSP_VQ CP-40 ADM1062ACPZ-REEL7 −40°C to +85°C 40-Lead LFCSP_VQ CP-40 ADM1062ASU −40°C to +85°C 48-Lead TQFP SU-48 ADM1062ASU-REEL7...
Page 35 ADM1062 NOTES Rev. 0 | Page 35 of 36...

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