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Summary of Contents for MSI D5062
- Page 1 D5062 MS-S3681 Server Motherboard User Guide...
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Page 2: Table Of Contents
Contents Regulatory Notices ......................4 Safety Information ......................7 Specifications ........................9 Overview of Components ....................11 Block Diagram .......................12 CPU Socket ........................14 Assembly Overview ....................15 Installing CPU & Heatsink ................... 16 Memory Slots .........................19 CPU0_DIMM_A1/A2~H1/H2, CPU1_DIMM_A1/A2~H1/H2: DDR5 DIMM Slots ... 19 Recommended Memory Population ................. - Page 3 Cooling Connectors ......................32 JCPUFAN0~1: 4-Pin Fan Connectors (debug only) ............ 32 J16: Liquid Leak Detection Connector............... 32 USB Connectors ......................33 JUSB3_0: USB 3.2 Gen 1 Connector ................33 Other Connectors and Components ................34 JFP2~3: DC-MHS Control Panel Header ..............34 JRST_P1: Reset Button Header .................
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Page 4: Regulatory Notices
Regulatory Notices WEEE Statement Under the European Union ( “EU” ) Directive on Waste Electrical and Electronic Equipment, Directive 2012/19/EU, products of “electrical and electronic equipment” cannot be discarded as municipal waste anymore and manufacturers of covered electronic equipment will be obligated to take back such products at the end of their useful life. -
Page 5: Chemical Substances Information
Chemical Substances Information In compliance with chemical substances regulations, such as the EU REACH Regulation (Regulation EC No. 1907/2006 of the European Parliament and the Council), MSI provides the information of chemical substances in products at: https://csr.msi.com/global/index Battery Information Please take special precautions if this product comes with a battery. -
Page 6: Environmental Policy
US. Copyright and Trademarks Notice Copyright © Micro-Star Int’ l Co., Ltd. All rights reserved. The MSI logo used is a registered trademark of Micro-Star Int’ l Co., Ltd. All other marks and names mentioned may be trademarks of their respective owners. -
Page 7: Safety Information
Safety Information Please read and follow these safety instructions carefully before ⚠ installing, operating or performing maintenance on the server. General Safety Instructions ● Always read the safety instructions carefully. ● Keep this User Guide for future reference. ● Keep this equipment away from humidity. ●... -
Page 8: Assembly And Installation
Assembly and Installation This equipment must be installed in restricted access areas by qualified personnel to comply with safety standards set by the NEC and IEC 62368-1, Third Edition, for Information Technology Equipment. Lifting and Placement WARNING: This server is heavy. ●... -
Page 9: Specifications
Specifications Model D5052 Form factor DC-MHS M-FLW Dimensions 423mm x 348mm Dual Intel® Xeon® 6700E-series, 6500P-series and 6700P-series processors, Processor TDP up to 350W Socket 2 x Intel® LGA 4710 (Socket E2) ● 32 x DDR5 DIMM slots, 8 channels per CPU (2DPC), RDIMM/ MRDIMM* - Max Frequency: »... - Page 10 Model D5052 ● Chassis intrusion (on board header) ● Supports via DC-SCM module MGT1: Security - TPM 2.0 module (optional) - ASPEED AST1060 Hardware Root-of-Trust module (optional) ● Supports via DC-SCM module MGT1: - 1 x 1000Base-T dedicated server management port Server »...
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Page 11: Overview Of Components
Overview of Components DC_SCM EDSFF0 EDSFF1 JBAT1 LED_H1 M2_0 BUZZER LED_L1 BATTERY M2_1 JUART_SEL_1 JTAG_SEL1 JRST_P1 JVROC1 JPWR_P1 JMBP_1 JDC1 JPWR1 JPWR2 JCHASSIS1 JPICPWR_1 JPICPWR_2 JPICPWR_3 JPICPWR_4 JUSB3_0 RISER1 RISER3 RISER4 RISER5 RISER6 J_IPMB1 CPU0 CPU1 FBP_I2C_2 FBP_I2C_3 JMCIO_P0_2 JMCIO_P0_1 JMCIO_P1_4 JMCIO_P1_3 FBP_I2C_1... -
Page 12: Block Diagram
Block Diagram CPU0 CPU1 DDR5 CH A~D 8 x DIMM Slots 8 x DIMM Slots DDR5 CH A~D (2DPC) (2DPC) LGA 4710 (Socket E2) LGA 4710 (Socket E2) CPU1_DIMM_A1/ A2 CPU0_DIMM_A1/ A2 CPU1_DIMM_D1/ D2 24 GT/s CPU0_DIMM_D1/ D2 4 x UPI 8 x DIMM Slots 8 x DIMM Slots DDR5 CH E~H... -
Page 13: Component Contents
Component Contents Component Page CPU Socket Memory Slots CPU0_DIMM_A1/A2~H1/H2, CPU1_DIMM_A1/A2~H1/H2: DDR5 DIMM Slots Storage Connectors M2_0~1: M.2 Slots (M Key, PCIe 4.0, 2280/ 22110) EDSFF0~1: E1.S 9.5mm Connectors Expansions RISER1,3,4~6: SFF-TA-1033 M-XIO Slots JMCIO_P0_1~4, JMCIO_P1_1~4: MCIO 8i Connectors Power Connectors JPWR1~2: CRPS/ M-CRPS 185x73.5mm Power Connectors JPICPWR_1~6: 12-Pin PICPWR Power Connectors Cooling Connectors... -
Page 14: Cpu Socket
CPU Socket CPU1 CPU0 Important ⚠ Overheating will seriously damage the CPU and system. Always make sure the ● cooling fan can work properly to protect the CPU from overheating. Make sure that you apply an even layer of thermal paste (or thermal tape) between the CPU and the heatsink to enhance heat dissipation. -
Page 15: Assembly Overview
Assembly Overview Important ⚠ Illustrations are for demonstration purposes only; actual parts may vary. 1U EVAC Heatsink 2U EVAC Heatsink Processor Heatsink Module (PHM) Processor Carrier Processor Processor Socket Socket Cover Bolster Plate Important ⚠ Please check the instruction that come with your heatsink and thermal paste for ●... -
Page 16: Installing Cpu & Heatsink
Installing CPU & Heatsink 1. Place the processor carrier on top of the processor in the tray with their pin 1 indicators aligned. If installed properly, the CPU will snap into the carrier’ s side latches and the carrier will latch firmly to it. No Shim Shim CPU Carrier: E2A... - Page 17 4. Check the heatsink for a diagonally cut corner or the #1clip on the heatsink label if present. Align the processor carrier’ s Pin 1 indicator with the heatsink’ s cut corner (#1 clip), then gently press the heatsink down to engage the carrier’ s latching mechanism to the heatsink at four corners.
- Page 18 7. Flip 4 anti-tilt wires to the locked position (outward) and make sure the wires are firmly secure. 4 x anti-tilt wires locked Important ⚠ Ensure the 4 anti-tilt wires rotate and lock into the designated positions on the stepped flanges, as specified in the table below for each CPU carrier.
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Page 19: Memory Slots
Memory Slots CPU0_DIMM_A1/A2~H1/H2, CPU1_DIMM_A1/A2~H1/H2: DDR5 DIMM Slots CPU0_DIMM_H1 Channel H CPU0_DIMM_H2 CPU0_DIMM_G1 Channel G CPU0_DIMM_G2 CPU0_DIMM_F1 Channel F CPU0_DIMM_F2 CPU0_DIMM_E1 Channel E CPU0_DIMM_E2 CPU0 CPU0_DIMM_A2 Channel A CPU0_DIMM_A1 CPU0_DIMM_B2 Channel B CPU0_DIMM_B1 CPU0_DIMM_C2 Channel C CPU0_DIMM_C1 CPU0_DIMM_D2 Channel D CPU0_DIMM_D1 CPU1_DIMM_H1 Channel H CPU1_DIMM_H2... -
Page 20: Recommended Memory Population
Recommended Memory Population Please read the following Guidelines before populating memory. ⚠ General Memory Population Rules ● Single DIMM Type Usage: Only one type of DIMM is allowed across the system. Mixing different DIMM types is not permitted. - Example: All DDR5 RDIMMs or all MRDIMMs. ●... -
Page 21: Dimms Population (X4/X8)
DIMMs Population (x4/x8) Intel® Xeon® 6700E Series DIMM population within IMC DDR Type Config Set A (x8) Config Set B (x4) Slot 1, Slot 2 Slot 1, Slot 2 x8, None x4, None RDIMM x4, x4 Intel® Xeon® 6700P/ 6500P Series DIMM population within IMC DDR Type Config Set A (x8) -
Page 22: Key Parameters For Dimm
Key Parameters for DIMM Intel® Xeon® 6700E Series Speed (MT/s); Voltage (V); DIMM Capacity (GB) Ranks & DIMMs per Channel (DPC) DDR Type DIMM DRAM Density 1DPC 2DPC & Data Width 16 Gb 24 Gb 32 Gb 1.1 V 1DPC 2DPC 1DPC 2DPC... -
Page 23: Dimm Configuration
DIMM Configuration Intel® Xeon® 6700E Series Slot 1 Slot 2 Slots DIMMs DRAM DIMM Memory DIMM DIMM DIMM DIMM Density Type Channel Channel Organization Channels Ranks & Capacity Ranks & Capacity (Gb) (SPC) (DPC) Width (GB) Width (GB) 2Rx8 32 GB 1 or 2 1Rx4 32 GB... -
Page 24: Ddr5 Only Dimm Configuration Diagram
DDR5 Only DIMM Configuration Diagram IMC7 IMC6 IMC5 IMC4 IMC0 IMC1 IMC2 IMC3 IMC# IMC7 IMC6 IMC5 IMC4 IMC0 IMC1 IMC2 IMC3 Channel Chan 7 Chan 6 Chan 5 Chan 4 Chan 0 Chan 1 Chan 2 Chan 3 DDR5 H1 H2 G1 G2 B2 B1 C2 C1 D2 D1 “V”... -
Page 25: Installing Memory Modules
Installing Memory Modules 1. Open the side clips to unlock the DIMM slot. 2. Insert the DIMM vertically into the slot, ensuring that the off-center notch at the bottom aligns with the slot. 3. Push the DIMM firmly into the slot until it clicks and the side clips automatically close. -
Page 26: Storage Connectors
Storage Connectors EDSFF0 EDSFF1 M2_0 M2_1 Storage Speed Name Description CPU1 CPU0 M2_0~1 PCIe 5.0 x2, 32GT/s EDSFF0~1 (E1.S) PCIe 5.0 x4, 32GT/s M2_0~1: M.2 Slots (M Key, 2280/ 22110) Please install the M.2 solid-state drive (SSD) into the M.2 slot as shown below. 1. -
Page 27: Edsff0~1: E1.S 9.5Mm Connectors
EDSFF0~1: E1.S 9.5mm Connectors The Connector supports EDSFF E1.S 9.5mm drives. P12V P12V P12V P12V P12V P12V EDSFF_PEHPCPU_SCL EDSFF_PEHPCPU_SDA P3V3_AUX RST_SMB_EDSFF EDSFF_DUALPORTEN# FM_CPU0_EDSFF_LED_LVC3_BUFF RST_PCIE_PLRST_EDSFF- RST_PLD_PERST_CLKREQN_OD P3V3_AUX FM_CPU0_EDSFFX_PRSNT0_LVC3_N FM_CPU0_EDSFFX_PWRDIS_LVC3 EDSFF0~1 CLK_100M_EDSFF- CLK_100M_EDSFF- CLK_100M_EDSFF+ CLK_100M_EDSFF+ P5E_CPU1_PE1_RX_D0- P5E_CPU1_PE1_TX_D0- P5E_CPU1_PE1_RX_D0+ P5E_CPU1_PE1_TX_D0+ P5E_CPU1_PE1_RX_D1- P5E_CPU1_PE1_TX_D1- P5E_CPU1_PE1_RX_D1+ P5E_CPU1_PE1_TX_D1+ P5E_CPU1_PE1_RX_D2- P5E_CPU1_PE1_TX_D2-... -
Page 28: Expansions
Expansions RISER6 RISER5 RISER4 RISER3 RISER1 CPU1 CPU0 Expansions Speed Name Description RISER1,3 PCIe 5.0 x16, 32 GT/s (from CPU0) RISER4~6 PCIe 5.0 x16, 32 GT/s (from CPU1) JMCIO_P0_1~4 PCIe 5.0 x8, 32 GT/s (from CPU0) JMCIO_P1_1~4 PCIe 5.0 x8, 32 GT/s (from CPU1) RISER1,3,4~6: SFF-TA-1033 M-XIO Slots The SFF-TA-1033 M-XIO (Modular Hardware System Extensible I/O) slots support PCIe interfaces and are designed for flexible use with both cable and card-edge... -
Page 29: Jmcio_P0_1~4, Jmcio_P1_1~4: Mcio 8I Connectors
JMCIO_P0_1~4, JMCIO_P1_1~4: MCIO 8i Connectors These are vertical 74-pin Mini Cool Edge IO (MCIO) connectors, which support PCIe 5.0 x8 32GT/s interface P5E_CPU_PE4_NVME_RX_D7+ P5E_CPU_PE4_NVME_TX_D7+ P5E_CPU_PE4_NVME_RX_D7- P5E_CPU_PE4_NVME_TX_D7- P5E_CPU_PE4_NVME_RX_D6+ P5E_CPU_PE4_NVME_TX_D6+ P5E_CPU_PE4_NVME_RX_D6- P5E_CPU_PE4_NVME_TX_D6- JMCIO_A8 JMCIO_BMC_SCL FM_SMB_PEHPCPU_MCIO_LVC3_ JMCIO_BMC_SDA ALERT_N CLK_100M_CPU_MCIO_R_D+ PCIe_RST1 CLK_100M_CPU_MCIO_R_D- FM_MCIO_CPU_PESTI_CBL_PRES_N JMCIO_P0_1~4 P5E_CPU_PE4_NVME_RX_D5+ P5E_CPU_PE4_NVME_TX_D5+ JMCIO_P1_1~4... -
Page 30: Power Connectors
Power Connectors JPWR1 JPWR2 JPICPWR_1 JPICPWR_4 JPICPWR_2 JPICPWR_3 JPICPWR_6 JPICPWR_5 JPWR1~2: CRPS/ M-CRPS 185x73.5mm Power Connectors These connectors support both the CRPS (Common Redundant Power Supply) and M-CRPS (Modular Hardware System Common Redundant Power Supply) specifications, allowing for the connection of compatible power supplies. To connect the power supply, ensure that the plug is correctly oriented and the pins are properly aligned with the connector. -
Page 31: Jpicpwr_1~6: 12-Pin Picpwr Power Connectors
JPICPWR_1~6: 12-Pin PICPWR Power Connectors The PICPWR (Platform Infrastructure Connectivity Power) connector enables the HPM (Host Processor Module) to supply power and manage sideband signals to peripherals, including GPUs (JPICPWR_1~4), the storage backplane (JPICPWR_5), and fan board (JPICPWR_6). Power Signals +12V +12V +12V... -
Page 32: Cooling Connectors
Cooling Connectors JCPUFAN0 JCPUFAN1 JCPUFAN0~1: 4-Pin Fan Connectors (debug only) The fan connector supports cooling fans with +12V. When connecting the wire to the connectors, always note that the red wire is the positive and should be connected to the +12V; the black wire is Ground and should be connected to GND. +12V JCPUFAN0~1 J16: Liquid Leak Detection Connector... -
Page 33: Usb Connectors
USB Connectors JUSB3_0 JUSB3_0: USB 3.2 Gen 1 Connector The USB (Universal Serial Bus) port is for attaching USB devices such as keyboard, mouse, or other USB-compatible devices. It supports up to 5Gbps and backward compatibility with USB 2.0 devices (480 Mbps). P5V_USB_1 USB2_P3_ESD_D+ USB3_P2_ESD_RX-... -
Page 34: Other Connectors And Components
Other Connectors and Components JFP2~3: DC-MHS Control Panel Header The DC-MHS control panel header for M-PESTI connects the HPM to the server’ s front panel, enabling essential controls such as power, LED indicators, buttons, and sideband signals for management and monitoring. ●... -
Page 35: Jrst_P1: Reset Button Header
JRST_P1: Reset Button Header This header is provided to connect the system reset button. FM_RST_BTN_CPU1_LVC18_N JRST_P1 JPWR_P1: Power Button Header This header is provided to connect the system power button. FM_PWR_BTN_CPU1_LVC18_N JPWR_P1 J_IPMB1: IPMB Header This header is used to connect the Intelligent Platform Management Bus. SMB_IPMB_STBY_CMOS_ISO_SDA J_IPMB1 SMB_IPMB_STBY_CMOS_ISO_SCL... -
Page 36: Jvroc1: Vroc Connector
JVROC1: VROC Connector Intel® Virtual RAID on CPU (Intel® VROC) is a hybrid RAID solution specifically designed for NVMe SSDs connected directly to the CPU. PU_KEY_CONN_PIN2_R JVROC1 FM_PCH_SATA_RAID_KEY_R FBP_I2C_1~4: I2C Headers I²C (Inter-Integrated Circuit) headers connect to the System Management Bus (SMBus), FBP_I2C_1~3 are for the hot-swap backplane;... -
Page 37: Ocp: Ocp 3.0 Mezzanine Slot
OCP: OCP 3.0 Mezzanine Slot This slot enables the deployment of a wide variety of additional options through OCP (Open Compute Project) network interface cards (NICs) or other expansion cards. OCP: OCP 3.0 SFF (PCIe 5.0 x16, from CPU0) CPU1 CPU0 Top Side (B Pins) OB14... - Page 38 Top Side (B Pins) Bottom Side (A Pins) Mechanical Key +12V_EDGE-1 GND-48 +12V_EDGE-2 GND-47 +12V_EDGE-3 GND-46 +12V_EDGE-4 GND-45 +12V_EDGE-5 GND-44 +12V_EDGE-6 GND-43 PD_OCP1_NIC_BIF0_N SMB_CPU0_PE3_OCP1_LVC3_SCL PD_OCP1_NIC_BIF1_N SMB_CPU0_PE3_OCP1_LVC3_SDA PD_OCP1_NIC_BIF2_N RST_BMC_PCIE_MUX_R_LVC3_N PERST0# PD_CPU0_OCP1_NIC_PRSNTA_N P3V3_AUX RST_CPU0_PE3_OCP1_PERST1_N FM_OCP_NIC_AUX_PWR_LVC3_R_EN FM_CPU0_OCP1_NIC_PRSNTB2_N GND-3 GND-42 CLK_100M_CPU0_OCP1_0_DN CLK_100M_CPU0_OCP1_1_DN CLK_100M_CPU0_OCP1_0_DP CLK_100M_CPU0_OCP1_1_DP GND-4 GND-41 P5E_CPU0_PE3_OCP_TX_DN15...
- Page 39 Top Side (B Pins) Bottom Side (A Pins) P5E_CPU0_PE3_OCP_TX_DP8 P5E_CPU0_PE3_OCP_RX_DP8 GND-13 GND-32 FM_CPU0_OCP1_NIC_PRSNTB0_N FM_CPU0_OCP1_NIC_PRSNTB1_N Mechanical Key GND-14 GND-31 P5E_CPU0_PE3_OCP_TX_DN7 P5E_CPU0_PE3_OCP_RX_DN7 P5E_CPU0_PE3_OCP_TX_DP7 P5E_CPU0_PE3_OCP_RX_DP7 GND-15 GND-30 P5E_CPU0_PE3_OCP_TX_DN6 P5E_CPU0_PE3_OCP_RX_DN6 P5E_CPU0_PE3_OCP_TX_DP6 P5E_CPU0_PE3_OCP_RX_DP6 GND-16 GND-29 P5E_CPU0_PE3_OCP_TX_DN5 P5E_CPU0_PE3_OCP_RX_DN5 P5E_CPU0_PE3_OCP_TX_DP5 P5E_CPU0_PE3_OCP_RX_DP5 GND-17 GND-28 P5E_CPU0_PE3_OCP_TX_DN4 P5E_CPU0_PE3_OCP_RX_DN4 P5E_CPU0_PE3_OCP_TX_DP4 P5E_CPU0_PE3_OCP_RX_DP4 GND-18 GND-27 P5E_CPU0_PE3_OCP_TX_DN3...
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Page 40: Dc-Scm: Dc-Scm 2.0 Edge Slot
DC-SCM: DC-SCM 2.0 Edge Slot The slot links the Datacenter Secure Control Module (DC-SCM) to the motherboard, enabling centralized power, management, and security control across server hardware. This standardized interface allows easy upgrades and compatibility across various platforms. DC_SCM: DC-SCM 2.0 (PCIe 5.0 x1, from CPU0) CPU1 CPU0... - Page 41 Top Side (B Pins) Bottom Side (A Pins) Mechanical Key CLK_66M_ESPI_CPU0_LVC18 P12V_AUX ESPI_CPU0_CS0_SCM_N P12V_AUX_1 RST_ESPI_CPU0_LVC18_N P12V_AUX_2 ESPI_CPU0_IO0_LVC18 P12V_AUX_3 ESPI_CPU0_IO1_LVC18 P12V_AUX_4 ESPI_CPU0_IO2_LVC18 GND-22 ESPI_CPU0_IO3_LVC18 GND-23 IRQ_ESPI_CPU0_ALERT0_FPGA_LVC18_N BMC_JTAG_LVC3_TCK BMC_JTAG_LVC3_TDI BMC_JTAG_LVC3_TDO GND-6 BMC_JTAG_LVC3_TMS SPI_CPU0_CLK_DCSCM_LVC18_R1 SPI_CPU0_CS0_DCSCM_LVC18_R1_N FM_HPM_STBY_RST_N SPI_CPU0_IO0_DCSCM_LVC18_R1 FM_HPM_STBY_EN SPI_CPU0_IO1_DCSCM_LVC18_R1 SMB_CHASSIS_SENSOR_STBY_LVC3_SCL SPI_CPU0_IO2_DCSCM_LVC18_R1 SMB_CHASSIS_SENSOR_STBY_LVC3_SDA SPI_CPU0_IO3_DCSCM_LVC18_R1 SMB_HSBP_SCM_LVC3_R_SCL SPI_CPU0_CS1_DCSCM_LVC18_R1_N SMB_HSBP_SCM_LVC3_R_SDA...
- Page 42 Top Side (B Pins) Bottom Side (A Pins) I3C_MNG_SCM_LVC1_R_SCL I3C_MNG_SCM_LVC1_R_SDA Mechanical Key CLK3_50M_SCM_RMII_CLK SMB_PCIE_SCM_LVC3_R_SCL RMII3_SCM_CRS_DV_R_DC SMB_PCIE_SCM_LVC3_R_SDA RMII3_SCM_TX_EN_R_DC SMB_IPMB_LVC3_CLK RMII3_SCM_TXD0_DC SMB_IPMB_LVC3_DAT RMII3_SCM_TXD1_DC SMB_CPLD_UPDATE_SCM_LVC3_R_SCL RMII3_SCM_RXD0_DC SMB_CPLD_UPDATE_SCM_LVC3_R_SDA RMII3_SCM_RXD1_DC SMB_PMBUS1_LVC3_SCL SMB_PMBUS1_LVC3_SDA UART0_TX_SCM_HPM_DATA BMC_SMB_LVC18_CLK1 SMB_HOST_STBY_LVC3_SCL BMC_SMB_LVC18_DAT1 SMB_HOST_STBY_LVC3_SDA GND-31 DBP_ASD_SCM_PREQ_LVC3_R_N SPI_CPU0_TPM_CLK_LVC18_MUX_R1 DBP_ASD_SCM_PRDY_LVC3_R_N SPI_CPU0_TPM_CS_LVC18_MUX_R1_N SMB16_IPMB_LVC3_SCL SPI_CPU0_TPM_MOSI_LVC18_MUX_R1 SMB16_IPMB_LVC3_SDA SPI_CPU0_TPM_MISO_LVC18_MUX_R1 FM_SCM_PRSNT0_LVC3_N SPI_BMC_FP_CK_R...
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Page 43: Jchassis1: Chassis Intrusion Header
JCHASSIS1: Chassis Intrusion Header This header connects to the chassis intrusion switch cable, which monitors and detects any unauthorized opening in the server’ s chassis. When the chassis is opened, this header sends a signal to notify the Baseboard Management Controller (BMC) to record the intrusion event or trigger an alert for administrators. -
Page 44: Bat1: Cmos Battery
BAT1: CMOS Battery If the CMOS battery is out of charge, the time in the BIOS will be reset and the data of system configuration will be lost. In this case, you need to replace the CMOS battery. Replacing CMOS battery 1. -
Page 45: Jumpers
Jumpers Important ⚠ Avoid adjusting jumpers when the system is on; it will damage the motherboard. JPASSWORD_C_1 JBAT1 JUART_SEL_1 JTAG_SEL1 JMBP_1 Jumper Name Default Setting Description MBP/ I3C MIPI Mode Select Jumper JMBP_1 1-2: MBP Mode (default) 2-3: I3C MIPI Mode CMOS Clear Jumper JBAT1 1-2: Normal (default) -
Page 46: Onboard Leds
Onboard LEDs LED_H1, LED_L1: Port 80 Debug LEDs The Port 80 Debug LEDs display progress and error codes during and after POST (Power-On Self Test). Hexadecimal Character Table Hexadecimal LED display Hexadecimal LED display... - Page 47 EPS.MSI.COM MSI.COM...
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