TYAN THUNDER K8QS Manual page 42

3.4.11 – 4GB Memory Hole Adjust
Feature
4GB Memory Hole Adjust
3.4.12 – Chipset Configuration Sub-Menu
Feature
Dram Bank Interleave
ECC
Dram ECC
ECC Scrub Redirection
4-bit ECC
DCACHE ECC Scrub CTL
L2 ECC Scrub CTL
Dram ECC Scrub CTL
Speculative TLB Reload
Option
Auto
Manual
Option
Auto
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Enable
Disable
Disable
40ns/80ns/160ns
/320ns/640ns/1.
28us/2.56us
Disable
40ns/80ns/160ns
/320ns/640ns/1.
28us/2.56us
Disable
1.31ms
/2.62ms/5.24ms/
10.49ms/20.97m
s/42ms/84ms
Enable
Disable
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Description
Auto – Adjust the memory hole size
automatically according to the
memory space used by PCI devices
Manual – Memory hole size is
determined manually
Description
Interleave memory blocks across
dram chip selects. BIOS will AUTO
detect capability on each Node.
ECC check/correct mode. This is a
Global enable function for all blocks
within CPU core and North Bridge
If all memory in the system supports
ECC, enabling this will initial scrub
dram and enable system requests to
dram to be checked and/or corrected
Enable ECC Scrubber to correct
errors detected in Dram during normal
CPU requests
Enable 4-bit ECC mode on Nodes
with ECC capable dims.
Set the rate of background scrubbing
for DCACHE lines
Set the rate of background scrubbing
for L2 cache lines
Set the rate of BACKGROUND
scrubbing for Dram.
Enable / Disable Speculative TLB
Reload