Dram Timing Configuration; Memory Configuration - Biostar GF8200 M2G PLUS - BIOS Manual

GF8200 M 2G+ BIOS Manual

DRAM Timing Configuration

DRAM Timing Config uration
Mem ory CLK
CAS Latency(Tcl)
RAS /CAS Delay(Tr cd)
Row Precharge Ti me(Trp)
Min Active RAS(T ras)
RAS /RAS Delay(Tr rd)
Row Cycle (Trc)
Com mand Rate(CR)
> Memory Configuratio n
DRAM Timing Mode
CAS Latency(CL)
2T Command
TRC D
TRP
vxx.xx (C)C opyright 198 5-200x, Amer ican Megatre nds, Inc.

Memory Configuration

Memor y Configurati on
Bank Interleaving
Enabl e Clock to Al l DIMMs
MemCl k Tristate C3 /ATLVID
Memor y Hole Remapp ing
Power Down Enable
Pow er Down Mode
vxx.xx (C)C opyright 198 5-200x, Amer ican Megatre nds, Inc.
Bank Interleaving
Bank Interleaving is an advanced chipset technique used to improve memory
perform ance. Memory interleaving increases bandwidth by allowing simultaneous
access to more than one piece of memory.
Options: Auto (Default) / Disabled
BIOS S ETUP UTILITY
Perfo rmance
[ Auto]
[ Auto]
[ Auto]
[ Auto]
[ Auto]
BIOS S ETUP UTILITY
Perfo rmance
[ Auto]
[ Disabled]
[ Disabled]
[ Enabled]
[ Enabled]
[ Channel]
28
S elect Screen
S elect Item
G o to Sub Scr een
En ter
F1 G eneral Help
F1 0 S ave and Exit
ES C E xit
Enab le Bank Memo ry
Inte rleaving
S elect Screen
S elect Item
+- C hange Option
F1 G eneral Help
F1 0 S ave and Exit
ES C E xit