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Transmeta Manuals
Computer Hardware
Crusoe TM5600
System design manual
Transmeta Crusoe TM5600 System Design Manual
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Contents
Table of Contents
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Table of Contents
Table of Contents
Overview
Chapter 1 System Block Diagram
Power Supply Requirements
Description of Elements in System Block Diagram
Processor
CD Ddr Sdram
DI Sdr Sdram
FIGURE 2 Transmeta Debug Connector a
Reference Design
Clocking
Using BIOS ROM for CMS Storage
System Reset
FIGURE 4 System Reset
FIGURE 1 Core System Block Diagram
FIGURE 3 Transmeta Debug Connector B
Chapter 2 Design Considerations
Important Processor Considerations
Important Power Management Issues
DI PCB Layout Guidelines
TM5400/TM5600 Longrun™ Design Considerations
About Longrun™ Technology
Longrun Power Supply
FIGURE 5 TM5400/TM5600 VRDA Connection and Timing Diagram for Longrun
VDDCORE Supply Transition Rates and Longrun
CVDD Rise and Fall Times
Thermal Design Considerations
South Bridge Recommendation
Power Planes and Power Supply Decoupling
Serial Flash Write Protection Circuit
Overview
Serial Flash Write Protection Circuitry
Schematic Diagram of the PLD in a System
Pinout
JEDEC Fuse Map
CUPL Source Code
Software Support
Mode Bit ROM Settings
Programming the Mode Bit ROM with Wintmm
Programming the Mode-Bit ROM with a Device Programmer
Chapter 3 PWB Layout
Very Important Layout Requirements
Layout Guidelines
Recommended Eight Layer PWB Stackup
Recommended Ten Layer PWB Stackup
Power Supply Decoupling Layout
FIGURE 6 TM5400/TM5600 VDDCORE Underside BGA Decoupling Example
Processor Footprint
FIGURE 7 TM5400/TM5600 Mechanical Footprint
BGA Pin Escape Diagram
FIGURE 8 BGA Pin Escape Example
Recommended Standard Spacing/Line/Via Constraints
Allegro Extended Spacing Constraints
Recommended PWB Fabrication Notes
Ddr Sdram
DDR Trace Route Examples
FIGURE 9 Recommended DDR Layout
FIGURE 10 4-Chip DDR Memory Layout, Top Layer
Secondary Side (Bottom)
FIGURE 11 4-Chip DDR Memory Layout, Internal Layer
FIGURE 12 4-Chip DDR Memory Layout, Bottom Layer
Chapter 4 Thermal Design Considerations
Overview
Thermal Design Guidelines
Thermal Transfer Device (TTD) Example Design
FIGURE 13 Thermal Measurement Probe Placement in Laptop System
Thermal Measurements
400Mhz TM120 at 1.7V
FIGURE 14 Thermal Measurements of TTD in Laptop System-Running Windows (Idle)
Power Measurements
TTD Mechanical Specifications
FIGURE 16 Thermal Transfer Device Mechanical Cross Section
FIGURE 17 TTD Mechanical Top View
FIGURE 18 TTD Mechanical Bottom View
FIGURE 19 TTD Mechanical Bottom View
Thermal Transfer Device Pictures
FIGURE 20 Crusoe Processor and TTD Mounting Holes
FIGURE 21 TTD over the Crusoe Processor
FIGURE 22 TTD in Place over the Crusoe Processor
FIGURE 23 Bottom of PC Board, Screws for TTD
Chapter 5 Crusoe Processor Reference Schematics Description
Core Schematics
System Level Reference Schematics
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System Design Guide
Transmeta Crusoe™ Processor
Model TM5400/TM5600
Preliminary Information
Confidential Information—NDA Required
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Related Manuals for Transmeta Crusoe TM5600
Computer Hardware Transmeta Crusoe TM5400 System Design Manual
(93 pages)
Computer Hardware Transmeta Crusoe TM5500 System Design Manual
(130 pages)
Computer Hardware Transmeta Crusoe TM5800 System Design Manual
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Summarization of Contents
Overview
System Block Diagram
Power Supply Requirements
Details the power supplies required for system components.
Description of Elements in System Block Diagram
Details the various elements shown in the system block diagram.
Processor
Covers PCI compatibility and power supply for the processor.
CD DDR SDRAM
Describes the CD DDR SDRAM port and its capabilities.
DI SDR SDRAM
Details the DI SDR SDRAM port and its recommended configurations.
Clocking
Explains the clock inputs and generation for the processor.
Using BIOS ROM for CMS storage
Describes using BIOS ROM for CMS storage.
System Reset
Details the system reset connections for proper operation.
Design Considerations
Important Processor Considerations
Covers crucial design points for the processor, including power.
Important Power Management Issues
Highlights important power management details and processor power supplies.
DI PCB Layout Guidelines
Provides guidelines for laying out DI memory signals on the PCB.
TM5400/TM5600 LongRun Design Considerations
Details design considerations for the LongRun technology.
About LongRun Technology
Explains how LongRun technology controls voltage and frequency.
LongRun Power Supply
Details the power supply requirements for LongRun.
VDDCORE Supply Transition Rates and LongRun
Discusses VDDCORE supply transition rates and their impact on LongRun.
CVDD Rise and Fall Times
Describes the rise and fall times for the CVDD supply.
Thermal Design Considerations
Covers thermal design aspects for the processor.
South Bridge Recommendation
Recommends south bridge chipsets for the system.
Power Planes and Power Supply Decoupling
Details power planes and decoupling capacitor placement.
Serial Flash Write Protection Circuit
Explains the circuit for protecting serial flash ROM.
Overview
Provides an overview of serial flash ROM protection.
Serial Flash Write Protection Circuitry
Describes the circuitry and logic for write protection.
Schematic Diagram of the PLD in a System
Shows the schematic diagram of the PLD in the system.
Pinout
Lists the pinout for the PLD.
JEDEC Fuse Map
Represents the fuse map for the write protection PLD.
CUPL Source Code
Provides the CUPL source code for the PLD.
Software Support
Explains software support for controlling the WP pin.
Mode Bit ROM Settings
Discusses settings for the mode bit ROM.
Programming the Mode Bit ROM with WinTMM
Details programming the mode bit ROM using WinTMM.
Programming the Mode-Bit ROM with a Device Programmer
Explains programming the mode-bit ROM with a device programmer.
PWB Layout
Very Important Layout Requirements
Lists essential layout requirements for meeting specified frequencies.
Layout Guidelines
Provides general guidelines for PWB layout.
Recommended Eight Layer PWB Stackup
Details the recommended eight-layer PWB stackup.
Recommended Ten Layer PWB Stackup
Details the recommended ten-layer PWB stackup.
Power Supply Decoupling Layout
Shows layout for power supply decoupling.
Processor Footprint
Details the mechanical footprint of the processor.
BGA Pin Escape Diagram
Illustrates the BGA pin escape routing.
Recommended Standard Spacing/Line/Via Constraints
Specifies standard spacing, line, and via constraints.
Allegro Extended Spacing Constraints
Details extended spacing constraints for Allegro.
Recommended PWB Fabrication Notes
Provides notes on PWB fabrication.
DDR SDRAM
Discusses DDR SDRAM layout practices.
DDR Trace Route Examples
Shows examples of DDR trace routing.
Secondary Side (Bottom)
Describes DDR memory layout on the secondary side.
Thermal Design Considerations
Overview
Provides an overview of processor heat generation and cooling.
Thermal Design Guidelines
Details guidelines for effective thermal management.
Thermal Transfer Device (TTD) Example Design
Presents an example design for a Thermal Transfer Device.
Thermal Measurements
Shows thermal measurements under different operating conditions.
400Mhz TM120 at 1.7V
Presents thermal measurements for a specific processor configuration.
Power Measurements
Lists power consumption measurements for the TM3200.
TTD Mechanical Specifications
Provides mechanical specifications for the Thermal Transfer Device.
Thermal Transfer Device Pictures
Shows images of the Crusoe processor and TTD.
Crusoe Processor Reference Schematics Description
Core Schematics
Details the core schematics, including interface connections.
Page 1. Index
Index page for the schematics.
Page 2. TM3200 and TM5400/TM5600 CD (CMS Dram) Connections
Shows CD interface connections for TM3200/TM5400.
Page 3. TM3200 and TM5400/TM5600 DI (DRAM Interface) port
Details the DI interface for TM3200/TM5400, including signals.
Page 4. TM3200 and TM5400/TM5600 PCI and Other Misc. Connections
Covers PCI and miscellaneous connections for TM3200/TM5400.
Page 5. TM3200 and TM5400/TM5600 Power connections
Shows power connections and decoupling for TM3200/TM5400.
Page 6. CD Memory
Details CD memory connections and layout.
Page 7. CD Memory Termination
Explains CD memory signal termination.
Page 8. DI Memory Bank 0-3 (SO-DIMM slots #O and #1)
Shows DI memory bank connections for SO-DIMM slots.
Page 9. DI Soldered Down Memory Bank
Details DI soldered down memory bank connections.
Page 10. DI Memory Termination
Explains DI memory signal termination.
Page 11. CMS and Mode ROMs, TDM Debug connectors
Shows CMS/Mode ROM connections and TDM debug connectors.
System Level Reference Schematics
Provides reference schematics for interacting system components.
Page 12. Power Supply : VDD CORE—LTC1736
Shows VDD CORE power supply using LTC1736.
Page 13. Power Supply : VDD CORE-MAX1711
Shows VDD CORE power supply using MAX1711.
outputPage 14. BIOS Boot ROM with CMS option
Details BIOS boot ROM with CMS option.
Page 15. Power Supply : Memory
Shows memory power supply details.
Page 16. Clock Generator
Shows a typical clock generator circuit.
South Bridge Examples
Provides examples of south bridge connections.
Page 17. Intel PIIX4 South Bridge
Details connections for the Intel PIIX4 South Bridge.
Page 18. Acer ALI M1535 South Bridge (part A)
Details connections for Acer ALI M1535 South Bridge (Part A).
Page 19. Acer ALI M1535 South Bridge (part B)
Details connections for Acer ALI M1535 South Bridge (Part B).
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