1PPS OUTPUT
A 1 pulse per second signal (100msec HIGH duration) is generated on 1PPS pin when the receiver has 3D position fix
using 4 or more satellites. The rising edge of the pulse is aligned with UTC second, with accuracy of about 10nsec. It
outputs constant LOW when no position fix is available initially.
LAYOUT GUIDELINES
Separate RF and digital circuits into different PCB regions.
It is necessary to maintain 50-ohm impedance throughout the entire RF signal path. Try keeping the RF signal path as
short as possible.
Do not route the RF signal line near noisy sources such as digital signals, oscillators, switching power supplies, or other
RF transmitting circuit. Do not route the RF signal under or over any other components (including PX1175RD), or other
signal traces. Do not route the RF signal path on an inner layer of a multi-layer PCB to minimize signal loss.
Avoid sharp bends for RF signal path. Make two 45-deg bends or a circular bend instead of a single 90-degree bend if
needed.
Avoid vias with RF signal path whenever possible. Every via adds inductive impedance. Vias are acceptable for
connecting the RF grounds between different layers. Each of the module's ground pins should have short trace tying
immediately to the ground plane below through a via.
The bypass capacitors should be low ESR ceramic types and located directly adjacent to the pin they are for.
HANDLING GUIDELINE
The PX1175RD modules are rated MSL4, must be used for SMT reflow mounting within 72 hours after taken out from
the vacuumed ESD-protective moisture barrier bag in factory condition < 30degC / 60% RH. If this floor life time is
exceeded, or if the received ESD-protective moisture barrier bag is not in vacuumed state, then the device need to be
pre-baked before SMT reflow process. Baking is to be done at 85degC for 8 to 12 hours. Once baked, floor life counting
begins from 0, and has 72 hours of floor life at factory condition < 30degC / 60% RH.
PX1175RD module is ESD sensitive device and should be handled with care.
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