Summary of Contents for National Instruments PCI-DI0-96
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PCI-DI0-96/PXl-6508/PCl-6503 User Manual 96-Вit and 24-Bit Рага//е/ Digital //0 lnterface for РС/, РХ!, and CompactPCI '7NATIONAL https://mod-e.ru/ ,.INSTRUMENТS� 374938А-01...
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Instruments Corporation. National Instruments respects the intellectual property of others, and we ask our users to do the same. NI software is protected by copyright and other intellectual property laws. Where NI software may be used to reproduce software or other materials belonging to others, you may use NI software only to reproduce materials that you may reproduce in accordance with the terms of any applicable license or other legal restriction.
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Contents Figure B-1. Interrupt Control Circuitry Block Diagram .......... B-3 Figure B-2. Control Word Formats for the 82C55A ..........B-7 Figure B-3. Control Word Format for the 82C53 ............ B-9 Figure B-4. Control Word to Configure Port A for Mode 1 Input ......B-18 Figure B-5.
PXI-6508. The PCI-6503 contains only one PPI, PPI A. SCXI SCXI stands for Signal Conditioning eXtensions for Instrumentation and is a National Instruments product line designed to perform front-end signal conditioning for National Instruments plug-in DAQ boards. Your DIO board Your DIO board refers to either the PCI-DIO-96, PXI-6508, or PCI-6503 board.
Chapter 1 Introduction Using PXI with CompactPCI Using PXI-compatible products with standard CompactPCI products is an important feature provided by the PXI Specification, Revision 1.0. If you use a PXI-compatible plug-in device in a standard CompactPCI chassis you can use the basic plug-in device functions, but the PXI-specific functions will be unavailable.
If you are using other software, refer to the installation instructions that accompany your software. Optional Equipment National Instruments offers a variety of products to use with your DIO board, including cables, connector blocks, and other accessories, as follows: •...
Chapter 1 Introduction The mating connector for the PCI-6503 is a 50-position, polarized ribbon socket connector with strain relief. National Instruments uses a polarized (keyed) connector to prevent inadvertent upside-down connections. Recommended manufacturer part numbers for this mating connector are as follows: •...
Chapter 2 Installation and Configuration Remove the expansion slot cover on the back panel of the computer. Touch the metal part inside your computer to discharge any static electricity that might be on your clothes or body. Insert the PCI-DIO-96 or PCI-6503 in a 5 V PCI slot. It may be a tight fit, but do not force the device into place.
Chapter 3 Signal Connections I/O Connector Signal Descriptions Table 3-1 lists the signal descriptions for the PCI-DIO-96 and PXI-6508 I/O connector pins. Table 3-1. Signal Descriptions for PCI-DIO-96 and PXI-6508 I/O Connectors Alternate Signal Name Port ID* Description 1, 3, 5, 7, 9, 11, 13, 15 APC<7..0>...
Never connect the +5 V power pins directly to ground or to any other voltage source on your DIO board or to any other device. Doing so can damage your DIO board and the computer. National Instruments is not liable for damage resulting from such a connection.
Chapter 3 Signal Connections Low DIO Power-up State (PXI-6508, PCI-6503 Only) If you select pulled-low mode, each DIO line will be pulled to GND (0 VDC) using a 100 kΩ resistor. If you want to pull a specific line high, connect a pull-up resistor that will give you a minimum of 2.8 VDC.
PCI Interface Circuitry Your DIO board uses the PCI MITE ASIC to communicate with the PCI bus. The PCI MITE ASIC was designed by National Instruments specifically for data acquisition. The PCI MITE is fully compliant with PCI Local Bus Specification, Revision 2.1.
Chapter 4 Theory of Operation Timing Specifications This section lists the timing specifications for handshaking with your DIO board. The handshaking lines STB* and IBF synchronize input transfers. The handshaking lines OBF* and ACK* synchronize output transfers. Table 4-1 describes signals appearing in the handshaking diagrams. Table 4-1.
Chapter 4 Theory of Operation Mode 1 Output Timing Figure 4-3 shows the timing specifications for an output transfer in mode 1. OBF* INTR ACK* † † Name Description Minimum Maximum — WR* = 0 to INTR = 0 — WR* = 1 to Output —...
Appendix A Specifications Level Input logic high voltage 2.2 V 5.3 V −0.3 V Input logic low voltage 0.8 V 10 µA † Input high current — = 5 V, resistors set to pull-up 75 µA Input high current — = 5 V, resistors set to pull-down −75 µA Input logic low current...
Appendix B Register-Level Programming — 82C53 Programmable Interval Timer (PCI-DIO-96, PXI-6508 Only) 82C53 Programmable Interval Timer (PCI-DIO-96, PXI-6508 Only) The PCI-DIO-96 and PXI-6508 contain an 82C53 programmable interval timer for use by register-level programmers only. The 82C53 programmable interval timer can generate timed interrupt requests to your computer.
Appendix B Register-Level Programming — Register Map and Description Introduction The three 8-bit ports of the 82C55A are divided into two groups of 12 signals: group A and group B. One 8-bit control word selects the mode of operation for each group. The group A control bits configure port A (A<7..0>) and the upper 4 bits (nibble) of port C (C<7..4>).
Appendix B Register-Level Programming — Register Map and Description Register Descriptions The following sections contain the register descriptions for the devices used on your DIO board. The register description bits labeled with an X indicate reserved bits. Always write a 0 to these bits.
Appendix B Register-Level Programming — Register Map and Description Table B-2 shows the control words for setting or resetting each bit in port C. Notice that programming the set/reset option for the bits of port C clears bit 7 of the control word. Table B-2.
Appendix B Register-Level Programming — Interrupt Control Register 2 Interrupt Control Register 2 Address: Base address + 15 (hex) Type: Write-only Word Size: 8-bit Bit Map (PCI-DIO-96/PXI-6508): INTEN CTRIRQ CTR1 Bit Map (PCI-6503): INTEN Name Description 7–3 Reserved. INTEN Interrupt Enable Bit—If this bit is set, the DIO board can interrupt the computer.
Specification, Revision 2.1, from the PCI Special Interest Group (SIG). The PXI-6508 is fully compliant with the National Instruments PXI Specification, Revision 1.0. All three boards use the PCI Local Bus to move data. The PCI Local Bus is a high performance, 32-bit bus with multiplexed address and data lines.
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To do this, use PCI BIOS calls to search PCI configuration space for the National Instruments vendor ID (0x1093) and PCI-DIO-96 device ID (0x0160), PXI-6508 device ID (0x13c0), or PCI-6503 device ID (0x17d0). If a board is found, the algorithm can store all the board’s configuration information into a data structure.
Appendix B Register-Level Programming — Programming In this example, the new base address for the PCI-DIO-96 or PXI-6508 is now 0xd1000. It is important that the memory range to which you re-map the board is not being used by another device or system resource.
Appendix B Register-Level Programming — Port C Status-Word Bit Definitions for Input (Ports A and B) Port C Status-Word Bit Definitions for Input (Ports A and B) Address: Base address + 02 (hex) for PPI A Base address + 06 (hex) for PPI B Base address + 0A (hex) for PPI C Base address + 0E (hex) for PPI D Type:...
Appendix B Register-Level Programming — Port C Status-Word Bit Definitions for Input (Ports A and B) Port C bits PC4 and PC5 1 = Input 0 = Output Figure B-7. Control Word to Configure Port A for Mode 1 Output Figure B-8 shows the control word written to the Configuration Register to configure port B for output in mode 1.
Appendix B Register-Level Programming — Port C Status-Word Bit Definitions for Bidirectional Data Path (Port A Only) Port C Status-Word Bit Definitions for Bidirectional Data Path (Port A Only) Address: Base address + 02 (hex) for PPI A Base address + 06 (hex) for PPI B Base address + 0A (hex) for PPI C Base address + 0E (hex) for PPI D Type:...
Appendix B Register-Level Programming — Port C Status-Word Bit Definitions for Bidirectional Data Path (Port A Only) To interrupt the computer using one of the 82C55A devices, program the selected 82C55A for the I/O mode desired. In mode 1, set either the INTEA or the INTEB bit to enable interrupts from port A or port B, respectively.
Appendix E Technical Support and Professional Services • Calibration Certificate—If your product supports calibration, you can obtain the calibration certificate for your product at ni.com/calibration If you searched and could not find the answers you need, contact ni.com your local office or NI corporate headquarters. Phone numbers for our worldwide offices are listed at the front of this manual.
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Glossary AIRQ0 PPI A port A interrupt enable bit AIRQ1 PPI A port B interrupt enable bit ANSI American National Standards Institute PPI A port A PPI A port B PPI A port C ASIC Application Specific Integrated Circuit American Wire Gauge binary coded decimal BIRQ0 PPI B port A interrupt enable bit...
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Glossary hexadecimal input/output input buffer full signal inches INTE1 port A output interrupt enable bit INTE2 port A input interrupt enable bit INTEA port A interrupt enable bit INTEB port B interrupt enable bit INTEN interrupt enable bit INTRA port A interrupt request status INTRB port B interrupt request status light-emitting diode...
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Glossary signal conditioning the manipulation of signals to prepare them for digitizing strobe input signal transistor-transistor logic typical volts supply voltage; for example, the voltage a computer supplies to its plug-in devices volts direct current virtual instrument—a combination of hardware and/or software elements, typically used with a PC, that has the functionality of a classic standalone instrument input voltage...
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